[Mesa-dev] [PATCH 06/15] radeonsi: move DB_SHADER_CONTROL into db_render_state

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

I will need this for fixing sample shading with 1 sample.

The good news is that all shader pm4 states no longer use the current context
state, so we can generate the pm4 states outside of draw_vbo if needed.
---
 src/gallium/drivers/radeonsi/si_pipe.h       |  1 +
 src/gallium/drivers/radeonsi/si_shader.h     |  1 -
 src/gallium/drivers/radeonsi/si_state.c      | 11 ++++++++++-
 src/gallium/drivers/radeonsi/si_state_draw.c | 18 +++++++-----------
 4 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index df81e1f..00d03be 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -168,6 +168,7 @@ struct si_context {
 	bool			db_inplace_flush_enabled;
 	bool			db_depth_clear;
 	bool			db_depth_disable_expclear;
+	unsigned		ps_db_shader_control;
 };
 
 /* si_blit.c */
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 559e4e2..9c6b238 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -186,7 +186,6 @@ struct si_pipe_shader {
 	unsigned			spi_shader_z_format;
 	unsigned			db_shader_control;
 	unsigned			cb_shader_mask;
-	bool				cb0_is_integer;
 	union si_shader_key		key;
 };
 
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index c66eac9..b83b930 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -896,6 +896,11 @@ static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *s
 	} else {
 		r600_write_context_reg(cs, R_028010_DB_RENDER_OVERRIDE2, 0);
 	}
+
+	r600_write_context_reg(cs, R_02880C_DB_SHADER_CONTROL,
+			       S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) |
+			       S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer) |
+			       sctx->ps_db_shader_control);
 }
 
 /*
@@ -1937,6 +1942,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
 	struct pipe_constant_buffer constbuf = {0};
 	struct r600_surface *surf = NULL;
 	struct r600_texture *rtex;
+	bool old_cb0_is_integer = sctx->framebuffer.cb0_is_integer;
 	int i;
 
 	if (sctx->framebuffer.state.nr_cbufs) {
@@ -1957,6 +1963,9 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
 	sctx->framebuffer.cb0_is_integer = state->nr_cbufs && state->cbufs[0] &&
 				  util_format_is_pure_integer(state->cbufs[0]->format);
 
+	if (sctx->framebuffer.cb0_is_integer != old_cb0_is_integer)
+		sctx->db_render_state.dirty = true;
+
 	for (i = 0; i < state->nr_cbufs; i++) {
 		if (!state->cbufs[i])
 			continue;
@@ -2983,7 +2992,7 @@ static void si_need_gfx_cs_space(struct pipe_context *ctx, unsigned num_dw,
 void si_init_state_functions(struct si_context *sctx)
 {
 	si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state, 0);
-	si_init_atom(&sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state, 7);
+	si_init_atom(&sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state, 10);
 
 	sctx->b.b.create_blend_state = si_create_blend_state;
 	sctx->b.b.bind_blend_state = si_bind_blend_state;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 28e92fc..54f2fd9 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -231,7 +231,7 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 {
 	struct si_context *sctx = (struct si_context *)ctx;
 	struct si_pm4_state *pm4;
-	unsigned i, spi_ps_in_control, db_shader_control;
+	unsigned i, spi_ps_in_control;
 	unsigned num_sgprs, num_user_sgprs;
 	unsigned spi_baryc_cntl = 0, spi_ps_input_ena;
 	uint64_t va;
@@ -242,9 +242,6 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 	if (pm4 == NULL)
 		return;
 
-	db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) |
-			    S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer);
-
 	for (i = 0; i < shader->shader.ninput; i++) {
 		switch (shader->shader.input[i].name) {
 		case TGSI_SEMANTIC_POSITION:
@@ -264,8 +261,6 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 		}
 	}
 
-	db_shader_control |= shader->db_shader_control;
-
 	spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.nparam) |
 		S_0286D8_BC_OPTIMIZE_DISABLE(1);
 
@@ -311,9 +306,6 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 		       S_00B02C_EXTRA_LDS_SIZE(shader->lds_size) |
 		       S_00B02C_USER_SGPR(num_user_sgprs));
 
-	si_pm4_set_reg(pm4, R_02880C_DB_SHADER_CONTROL, db_shader_control);
-
-	shader->cb0_is_integer = sctx->framebuffer.cb0_is_integer;
 	sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
@@ -679,8 +671,7 @@ static void si_update_derived_state(struct si_context *sctx)
 
 	si_shader_select(ctx, sctx->ps_shader);
 
-	if (!sctx->ps_shader->current->pm4 ||
-	    sctx->ps_shader->current->cb0_is_integer != sctx->framebuffer.cb0_is_integer)
+	if (!sctx->ps_shader->current->pm4)
 		si_pipe_shader_ps(ctx, sctx->ps_shader->current);
 
 	si_pm4_bind_state(sctx, ps, sctx->ps_shader->current->pm4);
@@ -693,6 +684,11 @@ static void si_update_derived_state(struct si_context *sctx)
 		sctx->emitted.named.ps = NULL;
 		si_update_spi_map(sctx);
 	}
+
+	if (sctx->ps_db_shader_control != sctx->ps_shader->current->db_shader_control) {
+		sctx->ps_db_shader_control = sctx->ps_shader->current->db_shader_control;
+		sctx->db_render_state.dirty = true;
+	}
 }
 
 static void si_state_draw(struct si_context *sctx,
-- 
1.9.1