[Mesa-dev] [PATCH 06/41] i965/fs_reg: Allocate double the number of vgrfs in SIMD16 mode
Jason Ekstrand
jason at jlekstrand.net
Sat Sep 20 10:22:55 PDT 2014
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 7 ++++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++--
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index bb7bc6c..588e5f0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -948,9 +948,10 @@ fs_reg::fs_reg(enum register_file file, int reg, enum brw_reg_type type,
fs_reg::fs_reg(class fs_visitor *v, const struct glsl_type *type)
{
init();
+ int reg_width = v->dispatch_width / 8;
this->file = GRF;
- this->reg = v->virtual_grf_alloc(v->type_size(type));
+ this->reg = v->virtual_grf_alloc(v->type_size(type) * reg_width);
this->reg_offset = 0;
this->type = brw_type_for_base_type(type);
this->width = v->dispatch_width;
@@ -2228,12 +2229,12 @@ fs_visitor::opt_register_renaming()
if (depth == 0 &&
inst->dst.file == GRF &&
- virtual_grf_sizes[inst->dst.reg] == 1 &&
+ virtual_grf_sizes[inst->dst.reg] == inst->dst.width / 8 &&
!inst->is_partial_write()) {
if (remap[dst] == -1) {
remap[dst] = dst;
} else {
- remap[dst] = virtual_grf_alloc(1);
+ remap[dst] = virtual_grf_alloc(inst->dst.width / 8);
inst->dst.reg = remap[dst];
progress = true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index f9bc82a..35dc318 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1613,7 +1613,7 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
}
}
- fs_reg src_payload = fs_reg(GRF, virtual_grf_alloc(length),
+ fs_reg src_payload = fs_reg(GRF, virtual_grf_alloc(length * reg_width),
BRW_REGISTER_TYPE_F);
emit(LOAD_PAYLOAD(src_payload, sources, length));
@@ -1775,7 +1775,7 @@ fs_visitor::emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, fs_reg sampler)
{
int reg_width = dispatch_width / 8;
int length = ir->coordinate->type->vector_elements;
- fs_reg payload = fs_reg(GRF, virtual_grf_alloc(length),
+ fs_reg payload = fs_reg(GRF, virtual_grf_alloc(length * reg_width),
BRW_REGISTER_TYPE_F);
fs_reg dest = fs_reg(this, glsl_type::uvec4_type);
fs_reg *sources = ralloc_array(mem_ctx, fs_reg, length);
--
2.1.0
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