[Mesa-dev] [PATCH 31/41] i965/fs: Use instruction execution sizes to set compression state
Jason Ekstrand
jason at jlekstrand.net
Sat Sep 20 10:23:20 PDT 2014
Signed-off-by: Jason Ekstrand <jason.ekstrand at intel.com>
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index f20a4a7..00cf3ec 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1536,12 +1536,25 @@ fs_generator::generate_code(const cfg_t *cfg)
brw_set_default_mask_control(p, inst->force_writemask_all);
brw_set_default_acc_write_control(p, inst->writes_accumulator);
- if (inst->force_uncompressed || dispatch_width == 8) {
+ switch (inst->exec_size) {
+ case 1:
+ case 2:
+ case 4:
+ assert(inst->force_writemask_all);
brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
- } else if (inst->force_sechalf) {
- brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
- } else {
- brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
+ break;
+ case 8:
+ if (inst->force_sechalf) {
+ brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
+ } else {
+ brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
+ }
+ break;
+ case 16:
+ brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
+ break;
+ default:
+ assert(!"Invalid instruction width");
}
switch (inst->opcode) {
--
2.1.0
More information about the mesa-dev
mailing list