[Mesa-dev] [PATCH 36/41] i965/fs: Use the GRF for UNTYPED_ATOMIC instructions
Jason Ekstrand
jason at jlekstrand.net
Sat Sep 20 10:23:25 PDT 2014
---
src/mesa/drivers/dri/i965/brw_eu.h | 2 +-
src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 +--
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 ++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 43 +++++++++++++++-----------
6 files changed, 36 insertions(+), 25 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index e6c26e3..a53648f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -391,7 +391,7 @@ void brw_CMP(struct brw_compile *p,
void
brw_untyped_atomic(struct brw_compile *p,
struct brw_reg dest,
- struct brw_reg mrf,
+ struct brw_reg payload,
unsigned atomic_op,
unsigned bind_table_index,
unsigned msg_length,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 39f94e9..fecbd8c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2704,7 +2704,7 @@ brw_set_dp_untyped_atomic_message(struct brw_compile *p,
void
brw_untyped_atomic(struct brw_compile *p,
struct brw_reg dest,
- struct brw_reg mrf,
+ struct brw_reg payload,
unsigned atomic_op,
unsigned bind_table_index,
unsigned msg_length,
@@ -2713,7 +2713,7 @@ brw_untyped_atomic(struct brw_compile *p,
brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UD));
- brw_set_src0(p, insn, retype(mrf, BRW_REGISTER_TYPE_UD));
+ brw_set_src0(p, insn, retype(payload, BRW_REGISTER_TYPE_UD));
brw_set_src1(p, insn, brw_imm_d(0));
brw_set_dp_untyped_atomic_message(
p, insn, atomic_op, bind_table_index, msg_length, response_length,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 11f5323..d7f5acf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -485,6 +485,7 @@ fs_inst::is_send_from_grf() const
case FS_OPCODE_INTERPOLATE_AT_SAMPLE:
case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET:
case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
+ case SHADER_OPCODE_UNTYPED_ATOMIC:
return true;
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
return src[1].file == GRF;
@@ -913,6 +914,8 @@ fs_inst::regs_read(fs_visitor *v, int arg) const
{
if (is_tex() && arg == 0 && src[0].file == GRF) {
return mlen;
+ } else if (opcode == SHADER_OPCODE_UNTYPED_ATOMIC && arg == 0) {
+ return mlen;
}
switch (src[arg].file) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index fe450a8..abb4cd1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -739,6 +739,7 @@ private:
void generate_untyped_atomic(fs_inst *inst,
struct brw_reg dst,
+ struct brw_reg payload,
struct brw_reg atomic_op,
struct brw_reg surf_index);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 5b2eb31..a2c1f8b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1476,6 +1476,7 @@ fs_generator::generate_shader_time_add(fs_inst *inst,
void
fs_generator::generate_untyped_atomic(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg payload,
struct brw_reg atomic_op,
struct brw_reg surf_index)
{
@@ -1484,9 +1485,8 @@ fs_generator::generate_untyped_atomic(fs_inst *inst, struct brw_reg dst,
surf_index.file == BRW_IMMEDIATE_VALUE &&
surf_index.type == BRW_REGISTER_TYPE_UD);
- brw_untyped_atomic(p, dst, brw_message_reg(inst->base_mrf),
- atomic_op.dw1.ud, surf_index.dw1.ud,
- inst->mlen, dispatch_width / 8);
+ brw_untyped_atomic(p, dst, payload, atomic_op.dw1.ud, surf_index.dw1.ud,
+ inst->mlen, inst->exec_size / 8);
brw_mark_surface_used(prog_data, surf_index.dw1.ud);
}
@@ -1902,7 +1902,7 @@ fs_generator::generate_code(const cfg_t *cfg)
break;
case SHADER_OPCODE_UNTYPED_ATOMIC:
- generate_untyped_atomic(inst, dst, src[0], src[1]);
+ generate_untyped_atomic(inst, dst, src[0], src[1], src[2]);
break;
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 7109c5f..916aef7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2704,46 +2704,53 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
fs_reg dst, fs_reg offset, fs_reg src0,
fs_reg src1)
{
- const unsigned operand_len = dispatch_width / 8;
- unsigned mlen = 0;
- fs_inst *inst;
+ int reg_width = dispatch_width / 8;
+ int length = 0;
+ fs_reg *sources = ralloc_array(mem_ctx, fs_reg, 4);
+
+ sources[0] = fs_reg(GRF, virtual_grf_alloc(1), BRW_REGISTER_TYPE_UD);
/* Initialize the sample mask in the message header. */
- emit(MOV(brw_uvec_mrf(8, mlen, 0), fs_reg(0u)))
+ emit(MOV(sources[0], fs_reg(0u)))
->force_writemask_all = true;
if (prog_data->uses_kill) {
- emit(MOV(brw_uvec_mrf(1, mlen, 7), brw_flag_reg(0, 1)))
+ emit(MOV(component(sources[0], 7), brw_flag_reg(0, 1)))
->force_writemask_all = true;
} else {
- emit(MOV(brw_uvec_mrf(1, mlen, 7),
+ emit(MOV(component(sources[0], 7),
retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UD)))
->force_writemask_all = true;
}
-
- mlen++;
+ length++;
/* Set the atomic operation offset. */
- emit(MOV(brw_uvec_mrf(dispatch_width, mlen, 0), offset));
- mlen += operand_len;
+ sources[1] = fs_reg(this, glsl_type::uint_type);
+ emit(MOV(sources[1], offset));
+ length++;
/* Set the atomic operation arguments. */
if (src0.file != BAD_FILE) {
- emit(MOV(brw_uvec_mrf(dispatch_width, mlen, 0), src0));
- mlen += operand_len;
+ sources[length] = fs_reg(this, glsl_type::uint_type);
+ emit(MOV(sources[length], src0));
+ length++;
}
if (src1.file != BAD_FILE) {
- emit(MOV(brw_uvec_mrf(dispatch_width, mlen, 0), src1));
- mlen += operand_len;
+ sources[length] = fs_reg(this, glsl_type::uint_type);
+ emit(MOV(sources[length], src1));
+ length++;
}
+ int mlen = 1 + (length - 1) * reg_width;
+ fs_reg src_payload = fs_reg(GRF, virtual_grf_alloc(mlen),
+ BRW_REGISTER_TYPE_UD);
+ emit(LOAD_PAYLOAD(src_payload, sources, length));
+
/* Emit the instruction. */
- inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst,
- fs_reg(atomic_op), fs_reg(surf_index));
- inst->base_mrf = 0;
+ fs_inst *inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst, src_payload,
+ fs_reg(atomic_op), fs_reg(surf_index));
inst->mlen = mlen;
- inst->header_present = true;
}
void
--
2.1.0
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