[Mesa-dev] [PATCH] i965: Require pixel alignment for GPU copy blit

[Neil Roberts]

This patch looks good to me.

The wording in the bspec seems a little vague so I was wondering if
maybe the real restriction is that the offset must be 4-byte aligned
rather than being aligned to the bpp. However I tried it with a 16-bit
type and sure enough it works to have an offset aligned to two bytes.

Reviewed-by: Neil Roberts <neil at linux.intel.com>

- Neil

Cody Northrop <cody at lunarg.com> writes:

> The blitter will start at a pixel's natural alignment. For PBOs, if the
> provided offset if not aligned, bits will get dropped.
>
> This change adds offset alignment check for src and dst, kicking back if
> the requirements are not met.
>
> The change is based on following verbiage from BSPEC:
>  Color pixel sizes supported are 8, 16, and 32 bits per pixel (bpp).
>  All pixels are naturally aligned.
>
> Found in the following locations:
> page 35 of intel-gfx-prm-osrc-hsw-blitter.pdf
> page 29 of ivb_ihd_os_vol1_part4.pdf
> page 29 of snb_ihd_os_vol1_part5.pdf
>
> This behavior was observed with Steam Big Picture rendering incorrect
> icon colors.  The fix has been tested on Ubuntu and SteamOS on Haswell.
>
> Signed-off-by: Cody Northrop <cody at lunarg.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83908