[Mesa-dev] [PATCH 13/14] i965: Emit ELSE/ENDIF JIP with type D on Gen 7.

[Matt Turner]

On Tue, Sep 23, 2014 at 1:24 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> On Thu, Aug 28, 2014 at 8:10 PM, Matt Turner <mattst88 at gmail.com> wrote:
>>
>> The spec says the type must be W (JIP is 16-bits after all), but we've
>> been emitting it with a UD type all along and have experienced no
>> adverse effects. Changing the type to D allows ELSE and ENDIF
>> instructions to be compacted.
>> ---
>>  src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> index 937257b..15e1da7 100644
>> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>> @@ -1496,7 +1496,7 @@ brw_ELSE(struct brw_compile *p)
>>     } else if (brw->gen == 7) {
>>        brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
>>        brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
>> -      brw_set_src1(p, insn, brw_imm_ud(0));
>> +      brw_set_src1(p, insn, brw_imm_d(0));
>
>
> If it requires W, why are we emitting it with type D?  I guess it shouldn't
> make any difference for a small immediate.

Because the compaction table doesn't have an entry for imm:W, but does
for imm:D.

Index 25 in the IVB tables is 001001110010000100 a:d | a:d | i:d | <1> | dir

which lets us compact ELSE and ENDIF instructions.