[Mesa-dev] [PATCH 15/16] i965/skl: Use new MOCS for SKL

[Kenneth Graunke]

On Wednesday, September 24, 2014 12:28:20 PM Kristian Høgsberg wrote:
> On Skylake, the MOCS bits are an index into a table of 63 different,
> configurable cache configurations.  As for previous GENs, we only care about
> WB and WT, which are available in the documented default set.  Define
> SKL_MOCS_WB and SKL_MOCS_WT to the indices for those configucations and use
> those for the Skylake MOCS values.
> 
> Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
> ---
>  src/mesa/drivers/dri/i965/brw_defines.h        |  6 ++++++
>  src/mesa/drivers/dri/i965/gen8_depth_state.c   | 10 ++++++----
>  src/mesa/drivers/dri/i965/gen8_draw_upload.c   |  8 +++++---
>  src/mesa/drivers/dri/i965/gen8_misc_state.c    | 14 ++++++++------
>  src/mesa/drivers/dri/i965/gen8_sol_state.c     |  3 ++-
>  src/mesa/drivers/dri/i965/gen8_surface_state.c |  7 ++++---
>  6 files changed, 31 insertions(+), 17 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index 39363c8..752f5d6 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -2402,6 +2402,12 @@ enum brw_wm_barycentric_interp_mode {
>  #define BDW_MOCS_WB 0x78
>  #define BDW_MOCS_WT 0x58
>  
> +/* Skylake: MOCS is now an index into an array of 64 different configurable
> + * cache settings.  We still use only either write-back or write-through; and
> + * rely on the documented default values. */

*/ goes on the next line.

> +#define SKL_MOCS_WB 9
> +#define SKL_MOCS_WT 5
> +
>  #include "intel_chipset.h"
>  
>  #endif
> diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> index 7c3bfe0..a0390f6 100644
> --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> @@ -48,6 +48,8 @@ emit_depth_packets(struct brw_context *brw,
>                     uint32_t lod,
>                     uint32_t min_array_element)
>  {
> +   uint32_t mocs_wb = brw->gen >=9 ? SKL_MOCS_WB : BDW_MOCS_WB;

missing space after >=, here and elsewhere in the patch.

Patches 1, 3, 10-11, 14, 15, and 16 (the ones not authored by me) are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/mesa-dev/attachments/20140924/6d53d105/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: This is a digitally signed message part.
URL: <http://lists.freedesktop.org/archives/mesa-dev/attachments/20140924/6d53d105/attachment.sig>