[Mesa-dev] [PATCH 4/6] i965/fs: Implement SIMD16 integer multiplies on Gen 7.

[Matt Turner]

---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index e1f5735..e6c34fa 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -634,14 +634,24 @@ fs_visitor::visit(ir_expression *ir)
             else
                emit(MUL(this->result, op[0], op[1]));
          } else {
-            if (brw->gen >= 7)
-               no16("SIMD16 explicit accumulator operands unsupported\n");
-
             struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
 
-            emit(MUL(acc, op[0], op[1]));
-            emit(MACH(reg_null_d, op[0], op[1]));
-            emit(MOV(this->result, fs_reg(acc)));
+            fs_inst *mul = emit(MUL(acc, op[0], op[1]));
+            fs_inst *mach = emit(MACH(reg_null_d, op[0], op[1]));
+            fs_inst *mov = emit(MOV(this->result, fs_reg(acc)));
+
+            if (brw->gen == 7 && dispatch_width == 16) {
+               mul->force_uncompressed = true;
+               mach->force_uncompressed = true;
+               mov->force_uncompressed = true;
+
+               mul = emit(MUL(acc, half(op[0], 1), half(op[1], 1)));
+               mul->force_sechalf = true;
+               mach = emit(MACH(reg_null_d, half(op[0], 1), half(op[1], 1)));
+               mach->force_sechalf = true;
+               mov = emit(MOV(half(this->result, 1), fs_reg(acc)));
+               mov->force_sechalf = true;
+            }
          }
       } else {
 	 emit(MUL(this->result, op[0], op[1]));
-- 
1.8.5.5