[Mesa-dev] [PATCH libdrm] radeon: Always multiply pitch_bytes by nsamples, not by slice_pt

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Tue, Sep 30, 2014 at 5:58 AM, Michel Dänzer <michel at daenzer.net> wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
>
> slice_pt is tileb[0] / tile_split, which isn't directly related to the
> pitch.
>
> This caused pitch_bytes to be too large in some cases.
>
> [0] Tile size in bytes
>
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  radeon/radeon_surface.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 0723425..930017e 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -595,7 +595,7 @@ static void eg_surf_minify(struct radeon_surface *surf,
>      mtile_ps = (mtile_pr * surflevel->nblk_y) / mtileh;
>
>      surflevel->offset = offset;
> -    surflevel->pitch_bytes = surflevel->nblk_x * bpe * slice_pt;
> +    surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
>      surflevel->slice_size = mtile_ps * mtileb * slice_pt;
>
>      surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;
> @@ -1498,7 +1498,7 @@ static void si_surf_minify_2d(struct radeon_surface *surf,
>      /* macro tile per slice */
>      mtile_ps = (mtile_pr * surflevel->nblk_y) / yalign;
>      surflevel->offset = offset;
> -    surflevel->pitch_bytes = surflevel->nblk_x * bpe * slice_pt;
> +    surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
>      surflevel->slice_size = mtile_ps * mtileb * slice_pt;
>
>      surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;
> --
> 2.1.1
>
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