[Mesa-dev] ssbo, vec4, nir - Re: [PATCH v3 (part2) 00/56] ARB_shader_storage_buffer_object (mesa, i965)
Jason Ekstrand
jason at jlekstrand.net
Tue Aug 4 17:54:00 PDT 2015
On Tue, Aug 4, 2015 at 5:09 PM, Jordan Justen <jordan.l.justen at intel.com> wrote:
> I checked the extension spec, and it appears that like image
> load/store, ssbo is only required in fragment and compute stages. I
> don't think the ssbo support in vec4 is quite as problematic as image
> load/store, so I'm not sure this information will prove useful.
>
> I did wonder what path we should take with ssbo, given that the vec4
> nir support landed. It seems like vec4 nir is not enabled by default
> at this point, and I'm not sure what the plan is there.
>
> Should we only enable ssbo for geometry stages:
>
> 1. Only when nir is enabled
>
> 2. Only when nir is disabled. (since that is the default currently)
>
> 3. Always
>
> 4. Not at all. (At least for now, since the spec doesn't require it)
>
> I think my vote would be #1, especially if we plan to enable nir for
> vec4 by default before the next release.
I would agree especially if we think that using NIR by default in mesa
11.0 is going to happen. Given how smoothly the vec4 NIR stuff has
worked, I think that's probably possible. Current shader-db results
on HSW are as following:
total instructions in shared programs: 1816713 -> 1798252 (-1.02%)
instructions in affected programs: 1671486 -> 1653025 (-1.10%)
helped: 5248
HURT: 12868
GAINED: 0
LOST: 0
We can probably whittle that down pretty quick.
--Jason
> -Jordan
>
> On 2015-07-14 00:46:02, Iago Toral Quiroga wrote:
>> This is the second part of the v3 series including remaining frontend bits
>> like the optional unsized array at the bottom of SSBO definitions, layout
>> mode std430 and implementation for GL queries/getters. It also includes
>> all of the i965 backend implementation.
>>
>> Notice that this series depends on the following patches from
>> Curro that have not been landed in master yet:
>>
>> i965/vec4: Import surface message builder functions.
>> i965/vec4: Import helpers to convert vectors into arrays and back.
>> i965/vec4: Import array utils for the surface message builder.
>> i965/fs: Import surface message builder functions.
>> i965/fs: Import helpers to convert vectors into arrays and back.
>> i965/fs: Import array utils for the surface message builder.
>> i965: Lift the constness restriction on surface indices passed to untyped ops.
>> i965/vec4: Introduce VEC4 IR builder.
>> i965/vec4: Make src_reg conversion constructor from dst_reg implicit.
>> i965: Add register constructors taking a backend_reg as argument.
>> i965/fs: Fix register coalesce not to lose track of the second half of 16-wide moves.
>>
>> This v3-part2 series, together with these patches from Curro and part1 (which
>> has already been landed in master), can be obtained from this development
>> repository:
>>
>> git clone -b itoral-ARB_shader_storage_buffer_object-v3-part2 https://github.com/Igalia/mesa.git
>>
>> Also notice that:
>> * Patch 55 is a separate bugfix that affects UBOs as well.
>> * Patch 56 is not required by the series and is completely optional.
>>
>> SSBO piglit tests have already been merged in piglit's master branch.
>>
>> Antia Puentes (1):
>> glsl: Consider active all elements of a shared/std140 block array
>>
>> Iago Toral Quiroga (29):
>> i965: Use 16-byte offset alignment for shader storage buffers
>> i965: Implement DriverFlags.NewShaderStorageBuffer
>> i965: Set MaxShaderStorageBuffers for compute shaders
>> i965: Upload Shader Storage Buffer Object surfaces
>> i965: handle visiting of ir_var_shader_storage variables
>> i965/fs: Do not split buffer variables
>> i965/fs: Do not include the header with a pixel mask in untyped read
>> messages
>> i965/vec4: Implement SSBO writes
>> nir: Implement __intrinsic_store_ssbo
>> i965/nir/fs: Implement SSBO writes
>> i965/vec4: Implement SSBO reads
>> nir: Implement __intrinsic_store_load
>> i965/nir/fs: Implement SSBO reads
>> nir: ignore an instruction's dest if it hasn't any
>> glsl: Rename atomic counter functions
>> glsl: Add atomic functions from ARB_shader_storage_buffer_object
>> glsl: lower SSBO atomic intrinsics
>> nir: Implement lowered SSBO atomic intrinsics
>> i965/nir/fs: Implement SSBO atomics
>> i965/vec4: Implement lowered SSBO atomic intrinsics
>> glsl: First argument to atomic functions must be a buffer variable
>> mesa: Add queries for GL_SHADER_STORAGE_BUFFER
>> glsl: Allow use of memory qualifiers with
>> ARB_shader_storage_buffer_object.
>> glsl: Apply memory qualifiers to buffer variables
>> glsl: Allow memory layout qualifiers on shader storage buffer objects
>> glsl: Do not allow assignments to read-only variables
>> glsl: Do not allow reads from write-only variables
>> docs: Mark ARB_shader_storage_buffer_object as done for i965.
>> i965/vec4: Skip dependency control for opcodes emitting multiple
>> instructions
>>
>> Kristian Høgsberg (1):
>> glsl: atomic counters can be declared as buffer-qualified variables
>>
>> Samuel Iglesias Gonsalvez (25):
>> i965: set ARB_shader_storage_buffer_object related constant values
>> glsl: add support for unsized arrays in shader storage blocks
>> glsl: Add parser/compiler support for unsized array's length()
>> glsl: Lower unsized array's length calculation expression
>> nir: add shader storage buffer's unsized array length calculation
>> i965/vec4: Implement unsized array's length calculation
>> i965/fs: Implement generator code for unsized array's length
>> calculation
>> i965/fs/nir: implement unsized array's length calculation
>> i965/wm: emit null buffer surfaces when null buffers are attached
>> i965/wm: surfaces should have the API buffer size, not the drm buffer
>> size
>> glsl: Add parser/compiler support for std430 interface packing
>> qualifier
>> glsl: propagate interface packing information to arrays of scalars,
>> vectors.
>> glsl: propagate std430 packing qualifier to struct's members and array
>> of structs
>> glsl: add std430 interface packing support to ssbo store and unsized
>> array length
>> glsl: a shader storage buffer must be smaller than the maximum size
>> allowed
>> glsl: number of active shader storage blocks must be within allowed
>> limits
>> glsl: ignore buffer variables when counting uniform components
>> glsl: shader storage blocks use different max block size values than
>> uniforms
>> mesa: add glShaderStorageBlockBinding()
>> glsl: fix UNIFORM_BUFFER_START or UNIFORM_BUFFER_SIZE query when no
>> buffer object is bound
>> main: Add SHADER_STORAGE_BLOCK and BUFFER_VARIABLE support for
>> ARB_program_interface_query
>> main/tests: add ARB_shader_storage_buffer_object tokens to
>> enum_strings
>> glapi: add ARB_shader_storage_block_buffer_object
>> mesa: Add getters for the GL_ARB_shader_storage_buffer_object max
>> constants
>> i965: Enable ARB_shader_storage_buffer_object extension for gen7+
>>
>> docs/GL3.txt | 2 +-
>> src/glsl/ast.h | 11 +
>> src/glsl/ast_array_index.cpp | 5 +-
>> src/glsl/ast_function.cpp | 37 ++
>> src/glsl/ast_to_hir.cpp | 323 +++++++++++++++--
>> src/glsl/ast_type.cpp | 1 +
>> src/glsl/builtin_functions.cpp | 215 ++++++++++-
>> src/glsl/builtin_types.cpp | 3 +-
>> src/glsl/glsl_lexer.ll | 10 +-
>> src/glsl/glsl_parser.yy | 77 ++++
>> src/glsl/glsl_types.cpp | 204 ++++++++---
>> src/glsl/glsl_types.h | 48 ++-
>> src/glsl/hir_field_selection.cpp | 15 +-
>> src/glsl/ir.cpp | 10 +
>> src/glsl/ir.h | 33 +-
>> src/glsl/ir_uniform.h | 5 +
>> src/glsl/ir_validate.cpp | 13 +
>> src/glsl/link_uniform_block_active_visitor.cpp | 23 ++
>> src/glsl/link_uniform_blocks.cpp | 32 +-
>> src/glsl/link_uniforms.cpp | 40 ++-
>> src/glsl/linker.cpp | 174 ++++++---
>> src/glsl/linker.h | 1 +
>> src/glsl/lower_ubo_reference.cpp | 377 +++++++++++++++++++-
>> src/glsl/nir/glsl_to_nir.cpp | 171 ++++++++-
>> src/glsl/nir/nir_intrinsics.h | 35 +-
>> src/glsl/nir/nir_lower_phis_to_scalar.c | 2 +
>> .../glapi/gen/ARB_shader_storage_buffer_object.xml | 36 ++
>> src/mapi/glapi/gen/GL4x.xml | 18 +-
>> src/mapi/glapi/gen/Makefile.am | 1 +
>> src/mapi/glapi/gen/gl_API.xml | 6 +-
>> src/mapi/glapi/gen/static_data.py | 1 +
>> src/mesa/drivers/dri/i965/brw_context.c | 13 +
>> src/mesa/drivers/dri/i965/brw_context.h | 6 +
>> src/mesa/drivers/dri/i965/brw_defines.h | 4 +
>> src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 +-
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_fs.h | 5 +
>> .../dri/i965/brw_fs_channel_expressions.cpp | 2 +
>> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 47 +++
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 260 ++++++++++++++
>> .../drivers/dri/i965/brw_fs_vector_splitting.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 35 +-
>> src/mesa/drivers/dri/i965/brw_shader.cpp | 6 +
>> src/mesa/drivers/dri/i965/brw_state_upload.c | 1 +
>> src/mesa/drivers/dri/i965/brw_vec4.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_vec4.h | 10 +
>> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 35 ++
>> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 391 ++++++++++++++++++++-
>> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 70 +++-
>> src/mesa/drivers/dri/i965/intel_buffer_objects.c | 2 +
>> src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
>> src/mesa/main/get.c | 38 +-
>> src/mesa/main/get_hash_params.py | 12 +
>> src/mesa/main/mtypes.h | 3 +-
>> src/mesa/main/program_resource.c | 7 +-
>> src/mesa/main/shader_query.cpp | 265 +++++++++++++-
>> src/mesa/main/tests/enum_strings.cpp | 15 +
>> src/mesa/main/uniforms.c | 52 +++
>> src/mesa/main/uniforms.h | 4 +
>> src/mesa/program/ir_to_mesa.cpp | 2 +
>> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 +
>> 61 files changed, 2982 insertions(+), 245 deletions(-)
>> create mode 100644 src/mapi/glapi/gen/ARB_shader_storage_buffer_object.xml
>>
>> --
>> 1.9.1
>>
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