[Mesa-dev] [PATCH v4 (part2) 14/59] nir: add shader storage buffer's unsized array length calculation
Connor Abbott
cwabbott0 at gmail.com
Wed Aug 5 11:59:49 PDT 2015
On Wed, Aug 5, 2015 at 1:30 AM, Iago Toral Quiroga <itoral at igalia.com> wrote:
> From: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
>
> Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
> ---
> src/glsl/nir/glsl_to_nir.cpp | 10 ++++++++++
> src/glsl/nir/nir_intrinsics.h | 9 +++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
> index 77327b6..642affd 100644
> --- a/src/glsl/nir/glsl_to_nir.cpp
> +++ b/src/glsl/nir/glsl_to_nir.cpp
> @@ -1618,6 +1618,16 @@ nir_visitor::visit(ir_expression *ir)
> instr->src[2].swizzle[i] = 0;
> }
> break;
> + case ir_triop_ssbo_unsized_array_length: {
> + nir_intrinsic_instr *load = nir_intrinsic_instr_create(this->shader,
> + nir_intrinsic_ssbo_unsized_array_length);
> + load->num_components = ir->type->vector_elements;
> + load->src[0] = evaluate_rvalue(ir->operands[0]);
> + load->src[1] = evaluate_rvalue(ir->operands[1]);
> + load->src[2] = evaluate_rvalue(ir->operands[2]);
> + add_instr(&load->instr, ir->type->vector_elements);
> + return;
> + }
> case ir_quadop_bitfield_insert:
> instr = emit(nir_op_bitfield_insert, dest_size, srcs);
> for (unsigned i = 0; i < ir->operands[0]->type->vector_elements; i++) {
> diff --git a/src/glsl/nir/nir_intrinsics.h b/src/glsl/nir/nir_intrinsics.h
> index bc6e6b8..f264f55 100644
> --- a/src/glsl/nir/nir_intrinsics.h
> +++ b/src/glsl/nir/nir_intrinsics.h
> @@ -62,6 +62,15 @@ INTRINSIC(interp_var_at_offset, 1, ARR(2), true, 0, 1, 0,
> NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
>
> /*
> + * Shared storage buffer's unsized array length calculation. It takes the
> + * SSBO index, unsized array offset inside the shader storage block interface
> + * and stride of unsized array.
> + */
> +
> +INTRINSIC(ssbo_unsized_array_length, 3, ARR(1), true, 1, 0, 0,
> + NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
It looks like there's 3 sources, but you've only specified the size of
one. Did you mean to do ARR(1, 1, 1)? With that fixed,
Reviewed-by: Connor Abbott <connor.w.abbott at intel.com>
> +
> +/*
> * a barrier is an intrinsic with no inputs/outputs but which can't be moved
> * around/optimized in general
> */
> --
> 1.9.1
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
More information about the mesa-dev
mailing list