[Mesa-dev] [PATCH 2/5] i965/fs: Lower 32x32 bit multiplication on BXT.

[Neil Roberts]

Are you sure this patch is necessary? The documentation for the multiply
instruction on BDW+ says:

SourceType : 	*D 	
DestinationType : 	*D 	
Project : 	EXCLUDE(CHV) 

This to me implies that it should work on BXT because it doesn't say
EXCLUDE(BXT).

I made a little test case and ran it on my BXT and it seems to work even
without this patch. I looked at the assembler source and it is
definitely doing a MUL instruction with D types for the dst and two
sources.

https://github.com/bpeel/piglit/blob/test-integer-multiply/tests/general/mult32.c

Regards,
- Neil

Francisco Jerez <currojerez at riseup.net> writes:

> AFAIK BXT has the same annoying alignment limitation as CHV on the
> source register regions of 32x32 bit MULs, give it the same treatment.
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 244f299..fc9f007 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -3126,9 +3126,9 @@ fs_visitor::lower_integer_multiplication()
>     bool progress = false;
>  
>     /* Gen8's MUL instruction can do a 32-bit x 32-bit -> 32-bit operation
> -    * directly, but Cherryview cannot.
> +    * directly, but CHV/BXT cannot.
>      */
> -   if (devinfo->gen >= 8 && !devinfo->is_cherryview)
> +   if (devinfo->gen >= 8 && !devinfo->is_cherryview && !devinfo->is_broxton)
>        return false;
>  
>     foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
> -- 
> 2.4.6
>
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