[Mesa-dev] [PATCH 0/5] Some register allocation improvements

Jason Ekstrand jason at jlekstrand.net
Mon Aug 10 12:06:24 PDT 2015

On Mon, Aug 10, 2015 at 11:24 AM, Matt Turner <mattst88 at gmail.com> wrote:
> On Fri, Jul 31, 2015 at 10:05 AM, Jason Ekstrand <jason at jlekstrand.net> wrote:
>> The following 5 patches contain a few register allocation cleanups and
>> performance improvements.  Chris Wilson noticed that setting up register
>> sets on i965 calls reralloc an absurd number of times.  I did a little
>> hacking and found out that the initial size for the collision lists is way
>> too low.  This series also contains a patch to avoid setting up registers
>> more times than needed on platforms where RA is the same for SIMD8 vs
>> SIMD16.
>> The whole series seems to cut about 4 minutes off a piglit run on BYT.  It
>> usually takes around 31 minutes and this time it ran in 27.
>> Jason Ekstrand (5):
>>   ra: Refactor ra_set_finalize
>>   ra: Delete the conflict lists in ra_set_finalize
>>   ra: Allocate bigger initial conflict lists
>>   i965/fs: Use dispatch_width instead of reg_width in alloc_reg_sets
> The first four are
> Reviewed-by: Matt Turner <mattst88 at gmail.com>
>>   i965/fs: Don't do redundant RA setup on IVB+
> I'll take your word that the register sets are identical between
> SIMD8/16 on IVB+ and give you an
> Acked-by: Matt Turner <mattst88 at gmail.com>

It's not that bad.  Basically, all of the gen checks are only for gen6
and below.

In any case, I pushed everything except patch 3.  Eric wasn't a fan of
the extra memory on vc4 and I think we can do even better if we're
more clever about transitive things.  I just need to think about it
and write code.

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