[Mesa-dev] [PATCH 3/6] i965: Create and use #defines for blitter constraints

[Ben Widawsky]

v2: Rebased. Some manual intervention required.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c    |  6 ++++--
 src/mesa/drivers/dri/i965/intel_blit.c        | 10 ++++++----
 src/mesa/drivers/dri/i965/intel_blit.h        |  3 +++
 src/mesa/drivers/dri/i965/intel_copy_image.c  |  7 ++++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |  4 ++--
 5 files changed, 19 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index c9ee526..88bfe35 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -32,6 +32,7 @@
  * \author Michel Dänzer <daenzer at vmware.com>
  */
 
+#include "intel_blit.h"
 #include "intel_mipmap_tree.h"
 #include "brw_context.h"
 #include "main/macros.h"
@@ -673,8 +674,9 @@ brw_miptree_choose_tiling(struct brw_context *brw,
    if (minimum_pitch < 64)
       return I915_TILING_NONE;
 
-   if (ALIGN(minimum_pitch, 512) >= 32768 ||
-       mt->total_width >= 32768 || mt->total_height >= 32768) {
+   if (ALIGN(minimum_pitch, 512) >= INTEL_MAX_BLIT_PITCH ||
+       mt->total_width >= INTEL_MAX_BLIT_PITCH ||
+       mt->total_height >= INTEL_MAX_BLIT_ROWS) {
       perf_debug("%dx%d miptree too large to blit, falling back to untiled",
                  mt->total_width, mt->total_height);
       return I915_TILING_NONE;
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 4a76ba9..27b7c22 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -315,7 +315,8 @@ intel_miptree_blit(struct brw_context *brw,
     * As a result of these two limitations, we can only use the blitter to do
     * this copy when the miptree's pitch is less than 32k linear or 128k tiled.
     */
-   if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) {
+   if (blt_pitch(src_mt) >= INTEL_MAX_BLIT_PITCH ||
+       blt_pitch(dst_mt) >= INTEL_MAX_BLIT_PITCH) {
       perf_debug("Falling back due to >= 32k/128k pitch\n");
       return false;
    }
@@ -352,9 +353,10 @@ intel_miptree_blit(struct brw_context *brw,
     * value. The values we're working with are unsigned, so make sure we don't
     * overflow.
     */
-   if (src_x >= 32768 || src_y >= 32768 || dst_x >= 32768 || dst_y >= 32768) {
-      perf_debug("Falling back due to >=32k offset [src(%d, %d) dst(%d, %d)]\n",
-                 src_x, src_y, dst_x, dst_y);
+   if (src_x >= INTEL_MAX_BLIT_PITCH || src_y >= INTEL_MAX_BLIT_ROWS ||
+       dst_x >= INTEL_MAX_BLIT_PITCH || dst_y >= INTEL_MAX_BLIT_ROWS) {
+      perf_debug("Falling back due to >=%dk offset [src(%d, %d) dst(%d, %d)]\n",
+                 src_x, src_y, dst_x, dst_y, INTEL_MAX_BLIT_PITCH >> 20);
       return false;
    }
 
diff --git a/src/mesa/drivers/dri/i965/intel_blit.h b/src/mesa/drivers/dri/i965/intel_blit.h
index c3d19a5..85b30f1 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.h
+++ b/src/mesa/drivers/dri/i965/intel_blit.h
@@ -30,6 +30,9 @@
 
 #include "brw_context.h"
 
+#define INTEL_MAX_BLIT_PITCH 32768
+#define INTEL_MAX_BLIT_ROWS 32768
+
 bool
 intelEmitCopyBlit(struct brw_context *brw,
                   GLuint cpp,
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c
index c12decc..82c17e0 100644
--- a/src/mesa/drivers/dri/i965/intel_copy_image.c
+++ b/src/mesa/drivers/dri/i965/intel_copy_image.c
@@ -69,9 +69,10 @@ copy_image_with_blitter(struct brw_context *brw,
     * As a result of these two limitations, we can only use the blitter to do
     * this copy when the miptree's pitch is less than 32k.
     */
-   if (src_mt->pitch >= 32768 ||
-       dst_mt->pitch >= 32768) {
-      perf_debug("Falling back due to >=32k pitch\n");
+   if (src_mt->pitch >= INTEL_MAX_BLIT_PITCH ||
+       dst_mt->pitch >= INTEL_MAX_BLIT_PITCH) {
+      perf_debug("Falling back due to >=%dk pitch\n",
+                 INTEL_MAX_BLIT_PITCH >> 20);
       return false;
    }
 
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e0a7f11..ba784de 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2606,11 +2606,11 @@ can_blit_slice(struct intel_mipmap_tree *mt,
    uint32_t image_x;
    uint32_t image_y;
    intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y);
-   if (image_x >= 32768 || image_y >= 32768)
+   if (image_x >= INTEL_MAX_BLIT_PITCH || image_y >= INTEL_MAX_BLIT_ROWS)
       return false;
 
    /* See intel_miptree_blit() for details on the 32k pitch limit. */
-   if (mt->pitch >= 32768)
+   if (mt->pitch >= INTEL_MAX_BLIT_PITCH)
       return false;
 
    return true;
-- 
2.5.0