[Mesa-dev] [PATCH 3/7] i965/gen9: Handle the GL_TEXTURE_{1D, 1D_ARRAY} targets inside switch
Pohjolainen, Topi
topi.pohjolainen at intel.com
Thu Aug 13 23:07:39 PDT 2015
On Thu, Aug 13, 2015 at 02:51:58PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
> src/mesa/drivers/dri/i965/brw_tex_layout.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index edd7518..6ac4024 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -194,9 +194,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context *brw,
> const unsigned align_3d_ys[] = {32, 32, 32, 16, 16};
> int i = 0;
>
> - assert(brw->gen >= 9 &&
> - mt->target != GL_TEXTURE_1D &&
> - mt->target != GL_TEXTURE_1D_ARRAY);
> + assert(brw->gen >= 9);
>
> /* Alignment computations below assume bpp >= 8 and a power of 2. */
> assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp)) ;
> @@ -216,8 +214,10 @@ tr_mode_vertical_texture_alignment(const struct brw_context *brw,
> align_yf = align_3d_yf;
> align_ys = align_3d_ys;
> break;
> + case GL_TEXTURE_1D:
> + case GL_TEXTURE_1D_ARRAY:
These two cases are actually unnecessary - without it will drop to the
default anyway. I checked the rest of the series and didn't find anything that
would take advantage of them either.
Anyway, I think it is cleaner to deal with them in the switch-case and
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> default:
> - unreachable("not reached");
> + unreachable("Unexpected miptree target");
> }
>
> /* Compute array index. */
> --
> 2.4.3
>
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