[Mesa-dev] [PATCH 3/8] i965: Move type_size() methods out of visitor classes.
Jason Ekstrand
jason at jlekstrand.net
Tue Aug 18 14:29:52 PDT 2015
On Mon, Aug 17, 2015 at 4:07 PM, Kenneth Graunke <kenneth at whitecape.org> wrote:
> I want to use C function pointers to these, and they don't use anything
> in the visitor classes anyway.
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +++++-----
> src/mesa/drivers/dri/i965/brw_fs.h | 1 -
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_shader.h | 3 +++
> src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
> src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp | 4 ++--
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8 ++++----
> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 26 +++++++++++++-------------
> 8 files changed, 28 insertions(+), 27 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 82cb499..93adbc6 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -455,8 +455,8 @@ fs_reg::component_size(unsigned width) const
> return MAX2(width * stride, 1) * type_sz(type);
> }
>
> -int
> -fs_visitor::type_size(const struct glsl_type *type)
> +extern "C" int
> +type_size_scalar(const struct glsl_type *type)
> {
> unsigned int size, i;
>
> @@ -467,11 +467,11 @@ fs_visitor::type_size(const struct glsl_type *type)
> case GLSL_TYPE_BOOL:
> return type->components();
> case GLSL_TYPE_ARRAY:
> - return type_size(type->fields.array) * type->length;
> + return type_size_scalar(type->fields.array) * type->length;
> case GLSL_TYPE_STRUCT:
> size = 0;
> for (i = 0; i < type->length; i++) {
> - size += type_size(type->fields.structure[i].type);
> + size += type_size_scalar(type->fields.structure[i].type);
> }
> return size;
> case GLSL_TYPE_SAMPLER:
> @@ -906,7 +906,7 @@ fs_reg
> fs_visitor::vgrf(const glsl_type *const type)
> {
> int reg_width = dispatch_width / 8;
> - return fs_reg(GRF, alloc.allocate(type_size(type) * reg_width),
> + return fs_reg(GRF, alloc.allocate(type_size_scalar(type) * reg_width),
> brw_type_for_base_type(type));
> }
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> index 975183e..c12aff7 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -112,7 +112,6 @@ public:
> void swizzle_result(ir_texture_opcode op, int dest_components,
> fs_reg orig_val, uint32_t sampler);
>
> - int type_size(const struct glsl_type *type);
> fs_inst *get_instruction_generating_reg(fs_inst *start,
> fs_inst *end,
> const fs_reg ®);
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index ce4153d..51ba23b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -131,7 +131,7 @@ fs_visitor::nir_setup_outputs(nir_shader *shader)
>
> switch (stage) {
> case MESA_SHADER_VERTEX:
> - for (int i = 0; i < ALIGN(type_size(var->type), 4) / 4; i++) {
> + for (int i = 0; i < ALIGN(type_size_scalar(var->type), 4) / 4; i++) {
> int output = var->data.location + i;
> this->outputs[output] = offset(reg, bld, 4 * i);
> this->output_components[output] = vector_elements;
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
> index 2cc97f2..f13db04 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.h
> +++ b/src/mesa/drivers/dri/i965/brw_shader.h
> @@ -307,6 +307,9 @@ bool brw_cs_precompile(struct gl_context *ctx,
> struct gl_shader_program *shader_prog,
> struct gl_program *prog);
>
> +int type_size_scalar(const struct glsl_type *type);
> +int type_size_vec4(const struct glsl_type *type);
> +
> #ifdef __cplusplus
> }
> #endif
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
> index 341c516..96371a5 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.h
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.h
> @@ -409,7 +409,6 @@ public:
>
> void visit_atomic_counter_intrinsic(ir_call *ir);
>
> - int type_size(const struct glsl_type *type);
> bool is_high_sampler(src_reg sampler);
>
> virtual void emit_nir_code();
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
> index d85fb6f..8a8dd57 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
> @@ -44,7 +44,7 @@ vec4_gs_visitor::nir_setup_inputs(nir_shader *shader)
> */
> assert(var->type->length > 0);
> int length = var->type->length;
> - int size = type_size(var->type) / length;
> + int size = type_size_vec4(var->type) / length;
> for (int i = 0; i < length; i++) {
> int location = var->data.location + i * BRW_VARYING_SLOT_COUNT;
> for (int j = 0; j < size; j++) {
> @@ -55,7 +55,7 @@ vec4_gs_visitor::nir_setup_inputs(nir_shader *shader)
> }
> }
> } else {
> - int size = type_size(var->type);
> + int size = type_size_vec4(var->type);
> for (int i = 0; i < size; i++) {
> src_reg src = src_reg(ATTR, var->data.location + i, var->type);
> src = retype(src, brw_type_for_base_type(var->type));
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index 923e2d3..78a1955 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -119,7 +119,7 @@ vec4_visitor::nir_setup_inputs(nir_shader *shader)
>
> foreach_list_typed(nir_variable, var, node, &shader->inputs) {
> int offset = var->data.driver_location;
> - unsigned size = type_size(var->type);
> + unsigned size = type_size_vec4(var->type);
> for (unsigned i = 0; i < size; i++) {
> src_reg src = src_reg(ATTR, var->data.location + i, var->type);
> nir_inputs[offset + i] = src;
> @@ -140,12 +140,12 @@ vec4_visitor::nir_setup_uniforms(nir_shader *shader)
> /* UBO's, atomics and samplers don't take up space in the
> uniform file */
> if (var->interface_type != NULL || var->type->contains_atomic() ||
> - type_size(var->type) == 0) {
> + type_size_vec4(var->type) == 0) {
> continue;
> }
>
> assert(uniforms < uniform_array_size);
> - this->uniform_size[uniforms] = type_size(var->type);
> + this->uniform_size[uniforms] = type_size_vec4(var->type);
>
> if (strncmp(var->name, "gl_", 3) == 0)
> nir_setup_builtin_uniform(var);
> @@ -161,7 +161,7 @@ vec4_visitor::nir_setup_uniforms(nir_shader *shader)
> strcmp(var->name, "parameters") == 0);
>
> assert(uniforms < uniform_array_size);
> - this->uniform_size[uniforms] = type_size(var->type);
> + this->uniform_size[uniforms] = type_size_vec4(var->type);
>
> struct gl_program_parameter_list *plist = prog->Parameters;
> for (unsigned p = 0; p < plist->NumParameters; p++) {
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> index 9062bcc..54a4f0a 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> @@ -597,8 +597,8 @@ vec4_visitor::visit_instructions(const exec_list *list)
> * This method is useful to calculate how much register space is needed to
> * store a particular type.
> */
> -int
> -vec4_visitor::type_size(const struct glsl_type *type)
> +extern "C" int
> +type_size_vec4(const struct glsl_type *type)
> {
> unsigned int i;
> int size;
> @@ -620,11 +620,11 @@ vec4_visitor::type_size(const struct glsl_type *type)
> }
> case GLSL_TYPE_ARRAY:
> assert(type->length > 0);
We need to get rid of this assertion somewhere in this series. It
breaks ARB programs in vec4 NIR because they can have an array of
uniforms that's 0 vec4's.
--Jason
> - return type_size(type->fields.array) * type->length;
> + return type_size_vec4(type->fields.array) * type->length;
> case GLSL_TYPE_STRUCT:
> size = 0;
> for (i = 0; i < type->length; i++) {
> - size += type_size(type->fields.structure[i].type);
> + size += type_size_vec4(type->fields.structure[i].type);
> }
> return size;
> case GLSL_TYPE_SUBROUTINE:
> @@ -654,7 +654,7 @@ src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type)
> init();
>
> this->file = GRF;
> - this->reg = v->alloc.allocate(v->type_size(type));
> + this->reg = v->alloc.allocate(type_size_vec4(type));
>
> if (type->is_array() || type->is_record()) {
> this->swizzle = BRW_SWIZZLE_NOOP;
> @@ -672,7 +672,7 @@ src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type, int size)
> init();
>
> this->file = GRF;
> - this->reg = v->alloc.allocate(v->type_size(type) * size);
> + this->reg = v->alloc.allocate(type_size_vec4(type) * size);
>
> this->swizzle = BRW_SWIZZLE_NOOP;
>
> @@ -684,7 +684,7 @@ dst_reg::dst_reg(class vec4_visitor *v, const struct glsl_type *type)
> init();
>
> this->file = GRF;
> - this->reg = v->alloc.allocate(v->type_size(type));
> + this->reg = v->alloc.allocate(type_size_vec4(type));
>
> if (type->is_array() || type->is_record()) {
> this->writemask = WRITEMASK_XYZW;
> @@ -1069,7 +1069,7 @@ vec4_visitor::visit(ir_variable *ir)
> assert(ir->data.location != -1);
> reg = new(mem_ctx) dst_reg(this, ir->type);
>
> - for (int i = 0; i < type_size(ir->type); i++) {
> + for (int i = 0; i < type_size_vec4(ir->type); i++) {
> output_reg[ir->data.location + i] = *reg;
> output_reg[ir->data.location + i].reg_offset = i;
> output_reg_annotation[ir->data.location + i] = ir->name;
> @@ -1091,14 +1091,14 @@ vec4_visitor::visit(ir_variable *ir)
> * Some uniforms, such as samplers and atomic counters, have no actual
> * storage, so we should ignore them.
> */
> - if (ir->is_in_buffer_block() || type_size(ir->type) == 0)
> + if (ir->is_in_buffer_block() || type_size_vec4(ir->type) == 0)
> return;
>
> /* Track how big the whole uniform variable is, in case we need to put a
> * copy of its data into pull constants for array access.
> */
> assert(this->uniforms < uniform_array_size);
> - this->uniform_size[this->uniforms] = type_size(ir->type);
> + this->uniform_size[this->uniforms] = type_size_vec4(ir->type);
>
> if (!strncmp(ir->name, "gl_", 3)) {
> setup_builtin_uniform_values(ir);
> @@ -2051,7 +2051,7 @@ vec4_visitor::compute_array_stride(ir_dereference_array *ir)
> /* Under normal circumstances array elements are stored consecutively, so
> * the stride is equal to the size of the array element.
> */
> - return type_size(ir->type);
> + return type_size_vec4(ir->type);
> }
>
>
> @@ -2120,7 +2120,7 @@ vec4_visitor::visit(ir_dereference_record *ir)
> for (i = 0; i < struct_type->length; i++) {
> if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
> break;
> - offset += type_size(struct_type->fields.structure[i].type);
> + offset += type_size_vec4(struct_type->fields.structure[i].type);
> }
>
> /* If the type is smaller than a vec4, replicate the last channel out. */
> @@ -2329,7 +2329,7 @@ vec4_visitor::visit(ir_assignment *ir)
> emit_bool_to_cond_code(ir->condition, &predicate);
> }
>
> - for (i = 0; i < type_size(ir->lhs->type); i++) {
> + for (i = 0; i < type_size_vec4(ir->lhs->type); i++) {
> vec4_instruction *inst = emit(MOV(dst, src));
> inst->predicate = predicate;
>
> --
> 2.5.0
>
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