[Mesa-dev] [PATCH V2 1/8] i965: Add a helper function intel_get_tile_dims()
Anuj Phogat
anuj.phogat at gmail.com
Wed Aug 19 17:24:48 PDT 2015
V2:
- Do the tile width/height computations in the new helper
function and use it later in intel_miptree_get_tile_masks().
- Change the name to intel_get_tile_dims().
Cc: Ben Widawsky <ben at bwidawsk.net>
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 81 +++++++++++++++++++--------
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 ++
2 files changed, 63 insertions(+), 22 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e85c3f0..c282e94 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -563,35 +563,15 @@ static unsigned long
intel_get_yf_ys_bo_size(struct intel_mipmap_tree *mt, unsigned *alignment,
unsigned long *pitch)
{
- const uint32_t bpp = mt->cpp * 8;
- const uint32_t aspect_ratio = (bpp == 16 || bpp == 64) ? 2 : 1;
uint32_t tile_width, tile_height;
unsigned long stride, size, aligned_y;
assert(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE);
-
- switch (bpp) {
- case 8:
- tile_height = 64;
- break;
- case 16:
- case 32:
- tile_height = 32;
- break;
- case 64:
- case 128:
- tile_height = 16;
- break;
- default:
- unreachable("not reached");
- }
-
- if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS)
- tile_height *= 4;
+ intel_get_tile_dims(mt->tiling, mt->tr_mode, mt->cpp,
+ &tile_width, &tile_height);
aligned_y = ALIGN(mt->total_height, tile_height);
stride = mt->total_width * mt->cpp;
- tile_width = tile_height * mt->cpp * aspect_ratio;
stride = ALIGN(stride, tile_width);
size = stride * aligned_y;
@@ -1081,6 +1061,63 @@ intel_miptree_get_image_offset(const struct intel_mipmap_tree *mt,
*y = mt->level[level].slice[slice].y_offset;
}
+
+/**
+ * This function computes the width and height in bytes of different tiling
+ * patterns. If the BO is untiled, the dimensions are set to cpp.
+ */
+void
+intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
+ uint32_t *tile_w, uint32_t *tile_h)
+{
+ if (tr_mode == INTEL_MIPTREE_TRMODE_NONE) {
+ switch (tiling) {
+ case I915_TILING_X:
+ *tile_w = 512;
+ *tile_h = 8 * cpp;
+ break;
+ case I915_TILING_Y:
+ *tile_w = 128;
+ *tile_h = 32 * cpp;
+ break;
+ case I915_TILING_NONE:
+ *tile_w = cpp;
+ *tile_h = cpp;
+ break;
+ default:
+ unreachable("not reached");
+ }
+ } else {
+ uint32_t aspect_ratio = 1;
+ assert(_mesa_is_pow_two(cpp));
+
+ switch (cpp) {
+ case 1:
+ *tile_h = 64 * cpp;
+ break;
+ case 2:
+ case 4:
+ *tile_h = 32 * cpp;
+ break;
+ case 8:
+ case 16:
+ *tile_h = 16 * cpp;
+ break;
+ default:
+ unreachable("not reached");
+ }
+
+ if (cpp == 2 || cpp == 8)
+ aspect_ratio = 2;
+
+ if (tr_mode == INTEL_MIPTREE_TRMODE_YS)
+ *tile_h *= 4;
+
+ *tile_w = *tile_h * aspect_ratio;
+ }
+}
+
+
/**
* This function computes masks that may be used to select the bits of the X
* and Y coordinates that indicate the offset within a tile. If the BO is
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 790d312..dc6a7a5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -626,6 +626,10 @@ intel_miptree_get_tile_masks(const struct intel_mipmap_tree *mt,
uint32_t *mask_x, uint32_t *mask_y,
bool map_stencil_as_y_tiled);
+void
+intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
+ uint32_t *tile_w, uint32_t *tile_h);
+
uint32_t
intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
GLuint level, GLuint slice,
--
2.4.3
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