[Mesa-dev] [PATCH] i965: Always re-emit the pipeline select during invariant state emission

[Jordan Justen]

Can you also cc mesa-stable in the commit message?

Cc: "10.6 11.0" <mesa-stable at lists.freedesktop.org>

-Jordan

On 2015-08-23 12:20:23, Jordan Justen wrote:
> On 2015-08-23 01:31:16, Chris Wilson wrote:
> > On the older platforms where we don't have logical contexts preserving
> > state across batches, we need to emit the invariant state setup on every
> > batch.
> 
> How about?: 'we emit the invariant state setup on every batch using
> the brw_invariant_state atom.'
> 
> Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
> 
> > This includes the pipeline selection which is cached with the
> > introduction of
> > 
> > commit 0e0e23ef537c9add672ff322f34e129a07edc55e
> > Author: Jordan Justen <jordan.l.justen at intel.com>
> > Date:   Wed Apr 22 11:43:50 2015 -0700
> > 
> >     i965/state: Emit pipeline select when changing pipelines
> > 
> > However, we do not reset the cache between batches on context-less
> > platforms. A simple solution is to just forcibly re-emit the pipeline
> > select along with the invariant state and reset the cache at that point.
> > 
> > Reported-by: Tomasz C. <tomaszc at o2.pl>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91254
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Jordan Justen <jordan.l.justen at intel.com>
> > Cc: Kenneth Graunke <kenneth at whitecape.org>
> > ---
> >  src/mesa/drivers/dri/i965/brw_misc_state.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
> > index e9d9467..2751152 100644
> > --- a/src/mesa/drivers/dri/i965/brw_misc_state.c
> > +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
> > @@ -878,7 +878,8 @@ brw_upload_invariant_state(struct brw_context *brw)
> >  {
> >     const bool is_965 = brw->gen == 4 && !brw->is_g4x;
> >  
> > -   brw_select_pipeline(brw, BRW_RENDER_PIPELINE);
> > +   brw_emit_select_pipeline(brw, BRW_RENDER_PIPELINE);
> > +   brw->last_pipeline = BRW_RENDER_PIPELINE;
> >  
> >     if (brw->gen < 6) {
> >        /* Disable depth offset clamping. */
> > -- 
> > 2.5.0
> >