[Mesa-dev] [PATCH] nvc0: make use of conservative depth info for forcing early z tests

[Ilia Mirkin]

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---

Entirely untested as there are no piglit tests for this
functionality. Won't push until some appear, but wanted to get it out
there.

 .../drivers/nouveau/codegen/nv50_ir_driver.h       |  2 +-
 .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp  |  3 +++
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c    |  2 +-
 src/gallium/drivers/nouveau/nvc0/nvc0_program.h    |  2 +-
 .../drivers/nouveau/nvc0/nvc0_shader_state.c       |  5 ----
 .../drivers/nouveau/nvc0/nvc0_state_validate.c     | 30 ++++++++++++++++++++--
 6 files changed, 34 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index 2b9edcf..14acb60 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -140,7 +140,7 @@ struct nv50_ir_prog_info
       struct {
          unsigned numColourResults;
          bool writesDepth;
-         bool earlyFragTests;
+         bool depthLayout;
          bool separateFragData;
          bool usesDiscard;
       } fp;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index f153674..dcfa4c4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -947,6 +947,9 @@ void Source::scanProperty(const struct tgsi_full_property *prop)
    case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
       // we don't care
       break;
+   case TGSI_PROPERTY_FS_DEPTH_LAYOUT:
+      info->prop.fp.depthLayout = prop->u[0].Data;
+      break;
    case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
       info->io.genUserClip = -1;
       break;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 12f1bb7..44d951b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -452,7 +452,7 @@ nvc0_fp_gen_header(struct nvc0_program *fp, struct nv50_ir_prog_info *info)
          fp->hdr[18] |= info->out[i].mask << info->out[i].slot[0];
    }
 
-   fp->fp.early_z = info->prop.fp.earlyFragTests;
+   fp->fp.depth_layout = info->prop.fp.depthLayout;
 
    return 0;
 }
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
index 390e0c7..fa14d68 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
@@ -44,7 +44,7 @@ struct nvc0_program {
       bool need_vertex_id;
    } vp;
    struct {
-      uint8_t early_z;
+      uint8_t depth_layout;
       uint8_t in_pos[PIPE_MAX_SHADER_INPUTS];
       uint8_t sample_interp;
    } fp;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index 8f8ac2d..1c87714 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -113,11 +113,6 @@ nvc0_fragprog_validate(struct nvc0_context *nvc0)
          return;
    nvc0_program_update_context_state(nvc0, fp, 4);
 
-   if (fp->fp.early_z != nvc0->state.early_z_forced) {
-      nvc0->state.early_z_forced = fp->fp.early_z;
-      IMMED_NVC0(push, NVC0_3D(FORCE_EARLY_FRAGMENT_TESTS), fp->fp.early_z);
-   }
-
    BEGIN_NVC0(push, NVC0_3D(SP_SELECT(5)), 2);
    PUSH_DATA (push, 0x51);
    PUSH_DATA (push, fp->code_base);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
index 47bd66d..609b3b8 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -517,25 +517,51 @@ nvc0_validate_global_residents(struct nvc0_context *nvc0,
    }
 }
 
+static bool
+nvc0_depth_layout_test_compatible(unsigned depth_layout, unsigned test)
+{
+   if (depth_layout && (test == PIPE_FUNC_ALWAYS || test == PIPE_FUNC_NEVER))
+      return true;
+   switch (depth_layout) {
+   case TGSI_FS_DEPTH_LAYOUT_UNCHANGED:
+      return true;
+   case TGSI_FS_DEPTH_LAYOUT_GREATER:
+      return test == PIPE_FUNC_GREATER || test == PIPE_FUNC_GEQUAL;
+   case TGSI_FS_DEPTH_LAYOUT_LESS:
+      return test == PIPE_FUNC_LESS || test == PIPE_FUNC_LEQUAL;
+   default:
+      return false;
+   }
+}
+
 static void
 nvc0_validate_derived_1(struct nvc0_context *nvc0)
 {
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   struct nvc0_program *fp = nvc0->fragprog;
    bool rasterizer_discard;
+   bool early_z = false;
 
    if (nvc0->rast && nvc0->rast->pipe.rasterizer_discard) {
       rasterizer_discard = true;
    } else {
       bool zs = nvc0->zsa &&
          (nvc0->zsa->pipe.depth.enabled || nvc0->zsa->pipe.stencil[0].enabled);
-      rasterizer_discard = !zs &&
-         (!nvc0->fragprog || !nvc0->fragprog->hdr[18]);
+      rasterizer_discard = !zs && (!fp || !fp->hdr[18]);
    }
 
    if (rasterizer_discard != nvc0->state.rasterizer_discard) {
       nvc0->state.rasterizer_discard = rasterizer_discard;
       IMMED_NVC0(push, NVC0_3D(RASTERIZE_ENABLE), !rasterizer_discard);
    }
+
+   if (fp && nvc0->zsa && nvc0->zsa->pipe.depth.enabled)
+      early_z = nvc0_depth_layout_test_compatible(
+         fp->fp.depth_layout, nvc0->zsa->pipe.depth.func);
+   if (early_z != nvc0->state.early_z_forced) {
+      nvc0->state.early_z_forced = early_z;
+      IMMED_NVC0(push, NVC0_3D(FORCE_EARLY_FRAGMENT_TESTS), early_z);
+   }
 }
 
 /* alpha test is disabled if there are no color RTs, so make sure we have at
-- 
2.4.6