[Mesa-dev] [PATCH 11/42] radeonsi: call si_init_atom for remaining radeonsi atoms
Marek Olšák
maraeo at gmail.com
Sun Aug 30 12:11:41 PDT 2015
From: Marek Olšák <marek.olsak at amd.com>
I need to initialize more atom IDs.
This adds 4 more si_init_atom calls, which simplifies the code.
(si_init_atom needs a different context type of the emit functions though)
---
src/gallium/drivers/radeonsi/si_compute.c | 4 ++--
src/gallium/drivers/radeonsi/si_cp_dma.c | 4 ++--
src/gallium/drivers/radeonsi/si_descriptors.c | 15 +++++++--------
src/gallium/drivers/radeonsi/si_hw_context.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.c | 10 ----------
src/gallium/drivers/radeonsi/si_state.c | 20 +++++++++-----------
src/gallium/drivers/radeonsi/si_state.h | 10 ++++++----
src/gallium/drivers/radeonsi/si_state_draw.c | 5 ++---
8 files changed, 29 insertions(+), 41 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 0cdecd6..e3caf5e 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -262,7 +262,7 @@ static void si_launch_grid(
SI_CONTEXT_INV_KCACHE |
SI_CONTEXT_FLUSH_WITH_INV_L2 |
SI_CONTEXT_FLAG_COMPUTE;
- si_emit_cache_flush(&sctx->b, NULL);
+ si_emit_cache_flush(sctx, NULL);
pm4->compute_pkt = true;
@@ -453,7 +453,7 @@ static void si_launch_grid(
SI_CONTEXT_INV_ICACHE |
SI_CONTEXT_INV_KCACHE |
SI_CONTEXT_FLAG_COMPUTE;
- si_emit_cache_flush(&sctx->b, NULL);
+ si_emit_cache_flush(sctx, NULL);
}
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 7bdac97..8dd12f6 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -166,7 +166,7 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
/* Flush the caches for the first copy only.
* Also wait for the previous CP DMA operations. */
if (sctx->b.flags) {
- si_emit_cache_flush(&sctx->b, NULL);
+ si_emit_cache_flush(sctx, NULL);
dma_flags |= SI_CP_DMA_RAW_WAIT; /* same as WAIT_UNTIL=CP_DMA_IDLE */
}
@@ -230,7 +230,7 @@ void si_copy_buffer(struct si_context *sctx,
/* Flush the caches for the first copy only. Also wait for old CP DMA packets to complete. */
if (sctx->b.flags) {
- si_emit_cache_flush(&sctx->b, NULL);
+ si_emit_cache_flush(sctx, NULL);
sync_flags |= SI_CP_DMA_RAW_WAIT;
}
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index b74c893..5588143 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -960,8 +960,7 @@ static void si_emit_shader_pointer(struct si_context *sctx,
desc->pointer_dirty = keep_dirty;
}
-static void si_emit_shader_userdata(struct si_context *sctx,
- struct r600_atom *atom)
+void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom)
{
unsigned i;
uint32_t *sh_base = sctx->shader_userdata.sh_base;
@@ -1028,12 +1027,12 @@ void si_init_all_descriptors(struct si_context *sctx)
sctx->b.b.set_stream_output_targets = si_set_streamout_targets;
sctx->b.invalidate_buffer = si_invalidate_buffer;
- /* Shader user data. */
- sctx->atoms.s.shader_userdata = &sctx->shader_userdata.atom;
- sctx->shader_userdata.atom.emit = (void*)si_emit_shader_userdata;
-
- /* Upper bound, 4 pointers per shader, +1 for vertex buffers, +2 for the VS copy shader. */
- sctx->shader_userdata.atom.num_dw = (SI_NUM_SHADERS * 4 + 1 + 2) * 4;
+ /* Shader user data.
+ * The number of dwords is set to the upper bound:
+ * 4 pointers per shader, +1 for vertex buffers, +2 for the VS copy shader.
+ */
+ si_init_atom(sctx, &sctx->shader_userdata.atom, &sctx->atoms.s.shader_userdata,
+ si_emit_shader_userdata, (SI_NUM_SHADERS * 4 + 1 + 2) * 4);
/* Set default and immutable mappings. */
si_set_user_data_base(sctx, PIPE_SHADER_VERTEX, R_00B130_SPI_SHADER_USER_DATA_VS_0);
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 5ef5db7..f821ad3 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -123,7 +123,7 @@ void si_context_gfx_flush(void *context, unsigned flags,
SI_CONTEXT_INV_TC_L2 |
/* this is probably not needed anymore */
SI_CONTEXT_PS_PARTIAL_FLUSH;
- si_emit_cache_flush(&ctx->b, NULL);
+ si_emit_cache_flush(ctx, NULL);
/* force to keep tiling flags */
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 330b946..03b0ee4 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -143,16 +143,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
si_init_all_descriptors(sctx);
- /* Initialize cache_flush. */
- sctx->cache_flush = si_atom_cache_flush;
- sctx->atoms.s.cache_flush = &sctx->cache_flush;
-
- sctx->msaa_sample_locs = si_atom_msaa_sample_locs;
- sctx->atoms.s.msaa_sample_locs = &sctx->msaa_sample_locs;
-
- sctx->msaa_config = si_atom_msaa_config;
- sctx->atoms.s.msaa_config = &sctx->msaa_config;
-
sctx->atoms.s.streamout_begin = &sctx->b.streamout.begin_atom;
sctx->atoms.s.streamout_enable = &sctx->b.streamout.enable_atom;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index f95684e..cc34f3b 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -35,10 +35,10 @@
#include "util/u_memory.h"
#include "util/u_pstipple.h"
-static void si_init_atom(struct si_context *sctx,
- struct r600_atom *atom, struct r600_atom **list_elem,
- void (*emit_func)(struct si_context *ctx, struct r600_atom *state),
- unsigned num_dw)
+void si_init_atom(struct si_context *sctx, struct r600_atom *atom,
+ struct r600_atom **list_elem,
+ void (*emit_func)(struct si_context *ctx, struct r600_atom *state),
+ unsigned num_dw)
{
atom->emit = (void*)emit_func;
atom->num_dw = num_dw;
@@ -2306,10 +2306,9 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
S_028208_BR_X(state->width) | S_028208_BR_Y(state->height));
}
-static void si_emit_msaa_sample_locs(struct r600_common_context *rctx,
+static void si_emit_msaa_sample_locs(struct si_context *sctx,
struct r600_atom *atom)
{
- struct si_context *sctx = (struct si_context *)rctx;
struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
unsigned nr_samples = sctx->framebuffer.nr_samples;
@@ -2317,11 +2316,8 @@ static void si_emit_msaa_sample_locs(struct r600_common_context *rctx,
SI_NUM_SMOOTH_AA_SAMPLES);
}
-const struct r600_atom si_atom_msaa_sample_locs = { si_emit_msaa_sample_locs, 18 }; /* number of CS dwords */
-
-static void si_emit_msaa_config(struct r600_common_context *rctx, struct r600_atom *atom)
+static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom)
{
- struct si_context *sctx = (struct si_context *)rctx;
struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples,
@@ -2329,7 +2325,6 @@ static void si_emit_msaa_config(struct r600_common_context *rctx, struct r600_at
sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0);
}
-const struct r600_atom si_atom_msaa_config = { si_emit_msaa_config, 10 }; /* number of CS dwords */
static void si_set_min_samples(struct pipe_context *ctx, unsigned min_samples)
{
@@ -3032,8 +3027,11 @@ static void si_init_config(struct si_context *sctx);
void si_init_state_functions(struct si_context *sctx)
{
+ si_init_atom(sctx, &sctx->cache_flush, &sctx->atoms.s.cache_flush, si_emit_cache_flush, 24);
si_init_atom(sctx, &sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state, 0);
+ si_init_atom(sctx, &sctx->msaa_sample_locs, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs, 18);
si_init_atom(sctx, &sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state, 10);
+ si_init_atom(sctx, &sctx->msaa_config, &sctx->atoms.s.msaa_config, si_emit_msaa_config, 10);
si_init_atom(sctx, &sctx->clip_regs, &sctx->atoms.s.clip_regs, si_emit_clip_regs, 6);
si_init_atom(sctx, &sctx->scissors.atom, &sctx->atoms.s.scissors, si_emit_scissors, 16*4);
si_init_atom(sctx, &sctx->viewports.atom, &sctx->atoms.s.viewports, si_emit_viewports, 16*8);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 881f6a5..a38a0f2 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -257,10 +257,15 @@ void si_all_descriptors_begin_new_cs(struct si_context *sctx);
void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer,
const uint8_t *ptr, unsigned size, uint32_t *const_offset);
void si_shader_change_notify(struct si_context *sctx);
+void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom);
/* si_state.c */
struct si_shader_selector;
+void si_init_atom(struct si_context *sctx, struct r600_atom *atom,
+ struct r600_atom **list_elem,
+ void (*emit_func)(struct si_context *ctx, struct r600_atom *state),
+ unsigned num_dw);
void si_update_fb_blend_state(struct si_context *sctx);
boolean si_is_format_supported(struct pipe_screen *screen,
enum pipe_format format,
@@ -287,10 +292,7 @@ void si_update_shaders(struct si_context *sctx);
void si_init_shader_functions(struct si_context *sctx);
/* si_state_draw.c */
-extern const struct r600_atom si_atom_cache_flush;
-extern const struct r600_atom si_atom_msaa_sample_locs;
-extern const struct r600_atom si_atom_msaa_config;
-void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *atom);
+void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom);
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
void si_trace_emit(struct si_context *sctx);
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 87ee746..2ff58d1 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -595,8 +595,9 @@ static void si_emit_draw_packets(struct si_context *sctx,
#define BOTH_ICACHE_KCACHE (SI_CONTEXT_INV_ICACHE | SI_CONTEXT_INV_KCACHE)
-void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *atom)
+void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom)
{
+ struct r600_common_context *sctx = &si_ctx->b;
struct radeon_winsys_cs *cs = sctx->rings.gfx.cs;
uint32_t cp_coher_cntl = 0;
uint32_t compute =
@@ -706,8 +707,6 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
sctx->flags = 0;
}
-const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 24 }; /* number of CS dwords */
-
static void si_get_draw_start_count(struct si_context *sctx,
const struct pipe_draw_info *info,
unsigned *start, unsigned *count)
--
2.1.4
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