[Mesa-dev] [PATCH 1/5] gallium/radeon: fix Hyper-Z hangs by programming PA_SC_MODE_CNTL_1 correctly
Alex Deucher
alexdeucher at gmail.com
Thu Dec 10 14:35:52 PST 2015
On Thu, Dec 10, 2015 at 8:10 AM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This is the recommended setting according to hw people and it makes Hyper-Z
> stable. Just the two magic states.
>
> This fixes Evergreen, Cayman, SI, CI, VI (using the Cayman code).
>
> Cc: 11.0 11.1 <mesa-stable at lists.freedesktop.org>
For the series:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> src/gallium/drivers/r600/evergreen_state.c | 9 +++++++--
> src/gallium/drivers/radeon/cayman_msaa.c | 12 +++++++++---
> src/gallium/drivers/radeon/r600d_common.h | 2 ++
> 3 files changed, 18 insertions(+), 5 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
> index 6e0c448..78fe87e 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -1582,12 +1582,17 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples,
> S_028C00_EXPAND_LINE_WIDTH(1)); /* R_028C00_PA_SC_LINE_CNTL */
> radeon_emit(cs, S_028C04_MSAA_NUM_SAMPLES(util_logbase2(nr_samples)) |
> S_028C04_MAX_SAMPLE_DIST(max_dist)); /* R_028C04_PA_SC_AA_CONFIG */
> - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1));
> + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,
> + EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1) |
> + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
> + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1));
> } else {
> radeon_set_context_reg_seq(cs, R_028C00_PA_SC_LINE_CNTL, 2);
> radeon_emit(cs, S_028C00_LAST_PIXEL(1)); /* R_028C00_PA_SC_LINE_CNTL */
> radeon_emit(cs, 0); /* R_028C04_PA_SC_AA_CONFIG */
> - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, 0);
> + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,
> + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
> + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1));
> }
> }
>
> diff --git a/src/gallium/drivers/radeon/cayman_msaa.c b/src/gallium/drivers/radeon/cayman_msaa.c
> index c6afa82..81f4112 100644
> --- a/src/gallium/drivers/radeon/cayman_msaa.c
> +++ b/src/gallium/drivers/radeon/cayman_msaa.c
> @@ -229,13 +229,17 @@ void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples,
> S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
> S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
> radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,
> - EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1));
> + EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1) |
> + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
> + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1));
> } else if (overrast_samples > 1) {
> radeon_set_context_reg(cs, CM_R_028804_DB_EQAA,
> S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
> S_028804_STATIC_ANCHOR_ASSOCIATIONS(1) |
> S_028804_OVERRASTERIZATION_AMOUNT(log_samples));
> - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, 0);
> + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,
> + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
> + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1));
> }
> } else {
> radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);
> @@ -245,6 +249,8 @@ void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples,
> radeon_set_context_reg(cs, CM_R_028804_DB_EQAA,
> S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
> S_028804_STATIC_ANCHOR_ASSOCIATIONS(1));
> - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, 0);
> + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,
> + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
> + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1));
> }
> }
> diff --git a/src/gallium/drivers/radeon/r600d_common.h b/src/gallium/drivers/radeon/r600d_common.h
> index b8e6564..eeec6ef 100644
> --- a/src/gallium/drivers/radeon/r600d_common.h
> +++ b/src/gallium/drivers/radeon/r600d_common.h
> @@ -179,6 +179,8 @@
>
> #define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C
> #define EG_S_028A4C_PS_ITER_SAMPLE(x) (((x) & 0x1) << 16)
> +#define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) & 0x1) << 25)
> +#define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) & 0x1) << 26)
>
> #define CM_R_028804_DB_EQAA 0x00028804
> #define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0)
> --
> 2.1.4
>
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