[Mesa-dev] [PATCH 16/26] i965: Add Gen8+ tessellation control shader state (3DSTATE_HS).

[Jordan Justen]

Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

On 2015-12-02 16:15:57, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/gen8_hs_state.c | 64 ++++++++++++++++++++++++-------
>  1 file changed, 51 insertions(+), 13 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen8_hs_state.c b/src/mesa/drivers/dri/i965/gen8_hs_state.c
> index 62e714d..38e2235 100644
> --- a/src/mesa/drivers/dri/i965/gen8_hs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_hs_state.c
> @@ -29,24 +29,62 @@
>  static void
>  gen8_upload_hs_state(struct brw_context *brw)
>  {
> -   /* Disable the HS Unit */
> -   BEGIN_BATCH(9);
> -   OUT_BATCH(_3DSTATE_HS << 16 | (9 - 2));
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   OUT_BATCH(0);
> -   ADVANCE_BATCH();
> +   const struct brw_stage_state *stage_state = &brw->tcs.base;
> +   /* BRW_NEW_TESS_CTRL_PROGRAM */
> +   bool active = brw->tess_ctrl_program;
> +   assert(!active || brw->tess_eval_program);
> +   /* BRW_NEW_HS_PROG_DATA */
> +   const struct brw_vue_prog_data *prog_data = &brw->tcs.prog_data->base;
> +
> +   if (active) {
> +      BEGIN_BATCH(9);
> +      OUT_BATCH(_3DSTATE_HS << 16 | (9 - 2));
> +      OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
> +                          GEN7_HS_SAMPLER_COUNT) |
> +                SET_FIELD(prog_data->base.binding_table.size_bytes / 4,
> +                          GEN7_HS_BINDING_TABLE_ENTRY_COUNT));
> +      OUT_BATCH(GEN7_HS_ENABLE |
> +                GEN7_HS_STATISTICS_ENABLE |
> +                (brw->max_hs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT |
> +                SET_FIELD(brw->tcs.prog_data->instances - 1,
> +                          GEN7_HS_INSTANCE_COUNT));
> +      OUT_BATCH(stage_state->prog_offset);
> +      OUT_BATCH(0);
> +      if (prog_data->base.total_scratch) {
> +         OUT_RELOC64(stage_state->scratch_bo,
> +                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
> +                     ffs(prog_data->base.total_scratch) - 11);
> +      } else {
> +         OUT_BATCH(0);
> +         OUT_BATCH(0);
> +      }
> +      OUT_BATCH(GEN7_HS_INCLUDE_VERTEX_HANDLES |
> +                SET_FIELD(prog_data->base.dispatch_grf_start_reg,
> +                          GEN7_HS_DISPATCH_START_GRF));
> +      OUT_BATCH(0); /* MBZ */
> +      ADVANCE_BATCH();
> +   } else {
> +      BEGIN_BATCH(9);
> +      OUT_BATCH(_3DSTATE_HS << 16 | (9 - 2));
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      OUT_BATCH(0);
> +      ADVANCE_BATCH();
> +   }
> +   brw->tcs.enabled = active;
>  }
>  
>  const struct brw_tracked_state gen8_hs_state = {
>     .dirty = {
>        .mesa  = 0,
> -      .brw   = BRW_NEW_CONTEXT,
> +      .brw   = BRW_NEW_BATCH |
> +               BRW_NEW_TCS_PROG_DATA |
> +               BRW_NEW_TESS_CTRL_PROGRAM,
>     },
>     .emit = gen8_upload_hs_state,
>  };
> -- 
> 2.6.2
> 
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