[Mesa-dev] [PATCH] i965/fs: Use the correct source for local memory load offsets

Jordan Justen jordan.l.justen at intel.com
Fri Dec 11 13:57:10 PST 2015


Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

On 2015-12-11 12:16:01, Jason Ekstrand wrote:
> The offset for loads is in src[0].  This was a copy+paste error in the
> nir_intrinsic_load/store refactoring.  This commit fixes a segfault in
> ES31-CTS.compute_shader.work-group-size.  I have no idea how piglit failed
> to catch this...
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93348
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index db38f61..f08f910 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -2453,7 +2453,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
>  
>        /* Get the offset to read from */
>        fs_reg offset_reg;
> -      nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]);
> +      nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]);
>        if (const_offset) {
>           offset_reg = brw_imm_ud(instr->const_index[0] + const_offset->u[0]);
>        } else {
> -- 
> 2.5.0.400.gff86faf
> 
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