[Mesa-dev] [PATCH v2 05/13] i965: Allocate URB space for HS and DS stages when required.

[Kenneth Graunke]

On Friday, December 11, 2015 01:23:54 PM Kenneth Graunke wrote:
> From: Chris Forbes <chrisf at ijw.co.nz>
> 
> v2: Rewrite the push constant allocation code to be clearer.
>     Only apply the minimum VS entries workaround on Gen 8.
> 
> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_context.h  |  21 +++-
>  src/mesa/drivers/dri/i965/gen7_blorp.cpp |   8 ++
>  src/mesa/drivers/dri/i965/gen7_urb.c     | 174 ++++++++++++++++++++++++-------
>  3 files changed, 166 insertions(+), 37 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 1cc4c7b..69bc04c 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1008,6 +1008,8 @@ struct brw_context
>     struct {
>        GLuint vsize;		/* vertex size plus header in urb registers */
>        GLuint gsize;	        /* GS output size in urb registers */
> +      GLuint hsize;             /* Tessellation control output size in urb registers */
> +      GLuint dsize;             /* Tessellation evaluation output size in urb registers */
>        GLuint csize;		/* constant buffer size in urb registers */
>        GLuint sfsize;		/* setup data size in urb registers */
>  
> @@ -1020,12 +1022,16 @@ struct brw_context
>        GLuint max_gs_entries;	/* Maximum number of GS entries */
>  
>        GLuint nr_vs_entries;
> +      GLuint nr_hs_entries;
> +      GLuint nr_ds_entries;
>        GLuint nr_gs_entries;
>        GLuint nr_clip_entries;
>        GLuint nr_sf_entries;
>        GLuint nr_cs_entries;
>  
>        GLuint vs_start;
> +      GLuint hs_start;
> +      GLuint ds_start;
>        GLuint gs_start;
>        GLuint clip_start;
>        GLuint sf_start;
> @@ -1042,6 +1048,11 @@ struct brw_context
>         * URB space for the GS.
>         */
>        bool gs_present;
> +
> +      /* True if the most recently sent _3DSTATE_URB message allocated
> +       * URB space for the HS and DS.
> +       */
> +      bool tess_present;
>     } urb;
>  
>  
> @@ -1648,12 +1659,18 @@ void gen8_emit_3dstate_sample_pattern(struct brw_context *brw);
>  /* gen7_urb.c */
>  void
>  gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
> +                              unsigned hs_size, unsigned ds_size,
>                                unsigned gs_size, unsigned fs_size);
>  
>  void
>  gen7_emit_urb_state(struct brw_context *brw,
> -                    unsigned nr_vs_entries, unsigned vs_size,
> -                    unsigned vs_start, unsigned nr_gs_entries,
> +                    unsigned nr_vs_entries,
> +                    unsigned vs_size, unsigned vs_start,
> +                    unsigned nr_hs_entries,
> +                    unsigned hs_size, unsigned hs_start,
> +                    unsigned nr_ds_entries,
> +                    unsigned ds_size, unsigned ds_start,
> +                    unsigned nr_gs_entries,
>                      unsigned gs_size, unsigned gs_start);
>  
>  
> diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> index e87b9d1..89b73ca 100644
> --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> @@ -50,6 +50,8 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
>     unsigned urb_size = (brw->is_haswell && brw->gt == 3) ? 32 : 16;
>     gen7_emit_push_constant_state(brw,
>                                   urb_size / 2 /* vs_size */,
> +                                 0 /* hs_size */,
> +                                 0 /* ds_size */,
>                                   0 /* gs_size */,
>                                   urb_size / 2 /* fs_size */);
>  
> @@ -60,6 +62,12 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
>                         32 /* num_vs_entries */,
>                         2 /* vs_size */,
>                         2 /* vs_start */,
> +                       0 /* num_hs_entries */,
> +                       1 /* hs_size */,
> +                       2 /* hs_start */,
> +                       0 /* num_ds_entries */,
> +                       1 /* ds_size */,
> +                       2 /* ds_start */,
>                         0 /* num_gs_entries */,
>                         1 /* gs_size */,
>                         2 /* gs_start */);
> diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
> index 99a9d3c..a598c89 100644
> --- a/src/mesa/drivers/dri/i965/gen7_urb.c
> +++ b/src/mesa/drivers/dri/i965/gen7_urb.c
> @@ -34,7 +34,7 @@
>   *   __________-__________   _________________-_________________
>   *  /                     \ /                                   \
>   * +-------------------------------------------------------------+
> - * |     VS/FS/GS Push     |              VS/GS URB              |
> + * |  VS/HS/DS/GS/FS Push  |           VS/HS/DS/GS URB           |
>   * |       Constants       |               Entries               |
>   * +-------------------------------------------------------------+
>   *
> @@ -60,28 +60,28 @@
>  static void
>  gen7_allocate_push_constants(struct brw_context *brw)
>  {
> +   /* BRW_NEW_GEOMETRY_PROGRAM */
> +   bool gs_present = brw->geometry_program;
> +
> +   /* BRW_NEW_TESS_CTRL_PROGRAM, BRW_NEW_TESS_EVAL_PROGRAM */
> +   bool tess_present = brw->tess_eval_program;
> +
>     unsigned avail_size = 16;
>     unsigned multiplier =
>        (brw->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 2 : 1;
>  
> -   /* BRW_NEW_GEOMETRY_PROGRAM */
> -   bool gs_present = brw->geometry_program;
> +   int stages = 2 + gs_present + tess_present;

Whoops.  This should clearly be 2 + gs_present + 2 * tess_present;

Fixed locally.
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