[Mesa-dev] [PATCH 1/2] nv50, nvc0: re-bind old compute state after reading MP perf counters

Samuel Pitoiset samuel.pitoiset at gmail.com
Fri Dec 18 06:48:16 PST 2015


This might be useful to avoid breaking the current compute state when
monitoring MP perf counters because we use a compute kernel to read out
those counters. This has been suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c | 2 ++
 src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c b/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
index 79c7023..5c75f15 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
@@ -218,6 +218,7 @@ nv50_hw_sm_end_query(struct nv50_context *nv50, struct nv50_hw_query *hq)
    struct pipe_context *pipe = &nv50->base.pipe;
    struct nouveau_pushbuf *push = nv50->base.pushbuf;
    struct nv50_hw_sm_query *hsq = nv50_hw_sm_query(hq);
+   struct nv50_program *old = nv50->compprog;
    uint32_t mask;
    uint32_t input[3];
    const uint block[3] = { 32, 1, 1 };
@@ -263,6 +264,7 @@ nv50_hw_sm_end_query(struct nv50_context *nv50, struct nv50_hw_query *hq)
    input[0] = hq->bo->offset + hq->base_offset;
    input[1] = hq->sequence;
    pipe->launch_grid(pipe, block, grid, 0, input);
+   pipe->bind_compute_state(pipe, old);
 
    nouveau_bufctx_reset(nv50->bufctx_cp, NV50_BIND_CP_QUERY);
 
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
index 3f5a876..7931be9 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
@@ -937,6 +937,7 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
    const bool is_nve4 = screen->base.class_3d >= NVE4_3D_CLASS;
    struct nvc0_hw_sm_query *hsq = nvc0_hw_sm_query(hq);
+   struct nvc0_program *old = nvc0->compprog;
    uint32_t mask;
    uint32_t input[3];
    const uint block[3] = { 32, is_nve4 ? 4 : 1, 1 };
@@ -990,6 +991,7 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
    input[1] = (hq->bo->offset + hq->base_offset) >> 32;
    input[2] = hq->sequence;
    pipe->launch_grid(pipe, block, grid, 0, input);
+   pipe->bind_compute_state(pipe, old);
 
    nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_QUERY);
 
-- 
2.6.4



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