[Mesa-dev] [PATCH] i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+

[Ilia Mirkin]

On Tue, Dec 29, 2015 at 10:15 AM, Marta Lofstedt
<marta.lofstedt at linux.intel.com> wrote:
> From: Marta Lofstedt <marta.lofstedt at intel.com>
>
> The imulExtended test of the shader bitfield tests of the
> OpenGL ES 3.1 CTS, fail on gen8+, when BRW_REGISTER_TYPE_W
> is used for SHADER_OPECODE_MULH.
>
> See:
> https://bugs.freedesktop.org/show_bug.cgi?id=92595
>
> Signed-off-by: Marta Lofstedt <marta.lofstedt at linux.intel.com>

You might also consider removing the type_is_signed helper -- this was
the only use. While I'm no i965 expert, I suspect using it is almost
always going to be a bug, since the type here is maintained very
differently than in the glsl ir.

Cheers,

  -ilia

> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 6ac2f85..511979d 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -3436,8 +3436,7 @@ fs_visitor::lower_integer_multiplication()
>               */
>              assert(mul->src[1].type == BRW_REGISTER_TYPE_D ||
>                     mul->src[1].type == BRW_REGISTER_TYPE_UD);
> -            mul->src[1].type = (type_is_signed(mul->src[1].type) ?
> -                                BRW_REGISTER_TYPE_W : BRW_REGISTER_TYPE_UW);
> +            mul->src[1].type = BRW_REGISTER_TYPE_UW;
>              mul->src[1].stride *= 2;
>
>           } else if (devinfo->gen == 7 && !devinfo->is_haswell &&
> --
> 2.5.0
>
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