[Mesa-dev] [PATCH 10/10] i965/fs: Add algebraic optimizations for MAD.

[Kenneth Graunke]

On Wednesday, February 04, 2015 08:21:27 PM Matt Turner wrote:
> total instructions in shared programs: 5764176 -> 5763808 (-0.01%)
> instructions in affected programs:     25121 -> 24753 (-1.46%)
> helped:                                164
> HURT:                                  2
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 69602a7..6f36e39 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -2417,6 +2417,32 @@ fs_visitor::opt_algebraic()
>              }
>           }
>           break;
> +      case BRW_OPCODE_MAD:
> +         if (inst->src[1].is_zero() || inst->src[2].is_zero()) {
> +            inst->opcode = BRW_OPCODE_MOV;
> +            inst->src[1] = reg_undef;
> +            inst->src[2] = reg_undef;
> +            progress = true;
> +         } else if (inst->src[0].is_zero()) {
> +            inst->opcode = BRW_OPCODE_MUL;
> +            inst->src[0] = inst->src[2];
> +            inst->src[2] = reg_undef;
> +         } else if (inst->src[1].is_one()) {
> +            inst->opcode = BRW_OPCODE_ADD;
> +            inst->src[1] = inst->src[2];
> +            inst->src[2] = reg_undef;
> +            progress = true;
> +         } else if (inst->src[2].is_one()) {
> +            inst->opcode = BRW_OPCODE_ADD;
> +            inst->src[2] = reg_undef;
> +            progress = true;
> +         } else if (inst->src[1].file == IMM && inst->src[2].file == IMM) {
> +            inst->opcode = BRW_OPCODE_MUL;

Shouldn't this be BRW_OPCODE_ADD?

MAD is src0 + src1 * src2.  If src1 and src2 are IMM, then we should
make this ADD src0 (src1 * src2).

With that fixed, and the shader-db numbers confirmed, patches 9-10 are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

> +            inst->src[1].fixed_hw_reg.dw1.f *= inst->src[2].fixed_hw_reg.dw1.f;
> +            inst->src[2] = reg_undef;
> +            progress = true;
> +         }
> +         break;
>        case SHADER_OPCODE_RCP: {
>           fs_inst *prev = (fs_inst *)inst->prev;
>           if (prev->opcode == SHADER_OPCODE_SQRT) {
> 
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