[Mesa-dev] [PATCH 21/32] i965/vec4: Fix the scheduler to take into account reads and writes of multiple registers.
currojerez at riseup.net
Fri Feb 13 03:50:26 PST 2015
Matt Turner <mattst88 at gmail.com> writes:
> On Fri, Feb 6, 2015 at 6:43 AM, Francisco Jerez <currojerez at riseup.net> wrote:
> We don't have any operations today that return more than a single
> register in the vec4 backend, do we? Presumably this is partly
> preparation for image_load_store?
Yeah, of course :).
> Reviewed-by: Matt Turner <mattst88 at gmail.com>
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