[Mesa-dev] [PATCH 3/4] i965/blorp: Optimize clamping tex coords.
Ian Romanick
idr at freedesktop.org
Thu Feb 19 15:35:02 PST 2015
This patch is
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
On 02/10/2015 11:09 AM, Matt Turner wrote:
> Each emit_cond_mov() emits a CMP of its first to arguments using the
> specified conditional mod, followed by a predicated MOV of the fifth
> argument into the fourth. In all four cases here, it was just
> implementing MIN/MAX which we can do in a single SEL instruction.
>
> Also reorder the instructions for a slightly better schedule.
> ---
> src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 ++++----
> src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 18 ++++++++++++++++++
> 2 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> index 10a53dc..fc111ae 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> @@ -1308,10 +1308,10 @@ brw_blorp_blit_program::clamp_tex_coords(struct brw_reg regX,
> struct brw_reg clampX1,
> struct brw_reg clampY1)
> {
> - emit_cond_mov(regX, clampX0, BRW_CONDITIONAL_L, regX, clampX0);
> - emit_cond_mov(regX, clampX1, BRW_CONDITIONAL_G, regX, clampX1);
> - emit_cond_mov(regY, clampY0, BRW_CONDITIONAL_L, regY, clampY0);
> - emit_cond_mov(regY, clampY1, BRW_CONDITIONAL_G, regY, clampY1);
> + emit_max(regX, regX, clampX0);
> + emit_max(regY, regY, clampY0);
> + emit_min(regX, regX, clampX1);
> + emit_min(regY, regY, clampY1);
> }
>
> /**
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
> index 8953ce8..bfad422 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
> +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
> @@ -85,6 +85,24 @@ protected:
> new (mem_ctx) fs_inst(BRW_OPCODE_LRP, 16, dst, src1, src2, src3));
> }
>
> + inline void emit_min(const struct brw_reg& dst,
> + const struct brw_reg& src1,
> + const struct brw_reg& src2)
> + {
> + fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
> + inst->conditional_mod = BRW_CONDITIONAL_L;
> + insts.push_tail(inst);
> + }
> +
> + inline void emit_max(const struct brw_reg& dst,
> + const struct brw_reg& src1,
> + const struct brw_reg& src2)
> + {
> + fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
> + inst->conditional_mod = BRW_CONDITIONAL_GE;
> + insts.push_tail(inst);
> + }
> +
> inline void emit_mov(const struct brw_reg& dst, const struct brw_reg& src)
> {
> insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src));
>
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