[Mesa-dev] [PATCH 1/2] i965/vec4: Add and use byte-MOV instruction for unpack 4x8.

[Ian Romanick]

FWIW, this patch is

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

On 02/11/2015 06:17 PM, Matt Turner wrote:
> Previously we were using a B/UB source in an Align16 instruction, which
> is illegal. It for some reason works on all platforms, except Broadwell.
> 
> Cc: "10.5" <mesa-stable at lists.freedesktop.org>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811
> ---
> I know! Another instruction for MOV! Sorry!
> 
>  src/mesa/drivers/dri/i965/brw_defines.h          |  1 +
>  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 16 ++++++++++++++++
>  src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp   |  4 ++--
>  3 files changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index a597d6b..17c27dd 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -911,6 +911,7 @@ enum opcode {
>  
>     SHADER_OPCODE_URB_WRITE_SIMD8,
>  
> +   VEC4_OPCODE_MOV_BYTES,
>     VEC4_OPCODE_PACK_BYTES,
>     VEC4_OPCODE_UNPACK_UNIFORM,
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index e38e6ea..85a92ee 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -1513,6 +1513,22 @@ vec4_generator::generate_code(const cfg_t *cfg)
>           generate_unpack_flags(inst, dst);
>           break;
>  
> +      case VEC4_OPCODE_MOV_BYTES: {
> +         /* Moves the low byte from each channel, using an Align1 access mode
> +          * and a <4,1,0> source region.
> +          */
> +         assert(src[0].type == BRW_REGISTER_TYPE_UB ||
> +                src[0].type == BRW_REGISTER_TYPE_B);
> +
> +         brw_set_default_access_mode(p, BRW_ALIGN_1);
> +         src[0].vstride = BRW_VERTICAL_STRIDE_4;
> +         src[0].width = BRW_WIDTH_1;
> +         src[0].hstride = BRW_HORIZONTAL_STRIDE_0;
> +         brw_MOV(p, dst, src[0]);
> +         brw_set_default_access_mode(p, BRW_ALIGN_16);
> +         break;
> +      }
> +
>        case VEC4_OPCODE_PACK_BYTES: {
>           /* Is effectively:
>            *
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> index 5638105..f15c66a 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> @@ -489,7 +489,7 @@ vec4_visitor::emit_unpack_unorm_4x8(const dst_reg &dst, src_reg src0)
>  
>     shifted.type = BRW_REGISTER_TYPE_UB;
>     dst_reg f(this, glsl_type::vec4_type);
> -   emit(MOV(f, src_reg(shifted)));
> +   emit(VEC4_OPCODE_MOV_BYTES, f, src_reg(shifted));
>  
>     emit(MUL(dst, src_reg(f), src_reg(1.0f / 255.0f)));
>  }
> @@ -511,7 +511,7 @@ vec4_visitor::emit_unpack_snorm_4x8(const dst_reg &dst, src_reg src0)
>  
>     shifted.type = BRW_REGISTER_TYPE_B;
>     dst_reg f(this, glsl_type::vec4_type);
> -   emit(MOV(f, src_reg(shifted)));
> +   emit(VEC4_OPCODE_MOV_BYTES, f, src_reg(shifted));
>  
>     dst_reg scaled(this, glsl_type::vec4_type);
>     emit(MUL(scaled, src_reg(f), src_reg(1.0f / 127.0f)));
>