[Mesa-dev] [PATCH 2/3] i965/fs/nir: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.

[Matt Turner]

On Fri, Feb 20, 2015 at 1:41 PM, Eric Anholt <eric at anholt.net> wrote:
>> Or maybe I'm just wrong and some bit is guaranteed to be set?
>
> A "This negation looks like it's safe in practice, because bits 0:4 will
> surely be TRIANGLES" comment seems fine with me.

Thanks, will do. R-b?

I realized I was looking at Vol4/Part1 which described the render
target write message header, which much the same description but not
the actual incoming thread dispatch payload. Vol2/Part1 has the info I
want.