[Mesa-dev] [RFC PATCH 08/40] i965/gen7.5: Implement opcodes for the hw-generated binding table EDIT commands

[Abdiel Janulgue]

Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_binding_tables.c | 40 ++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_defines.h        |  5 ++++
 src/mesa/drivers/dri/i965/brw_state.h          |  9 ++++++
 3 files changed, 54 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 3807301..e853aac 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -45,6 +45,11 @@
 #include "intel_batchbuffer.h"
 
 static const int bt_size = 256 * sizeof(uint16_t);
+static const GLuint stage_to_bt_edit[MESA_SHADER_FRAGMENT + 1] = {
+   _3DSTATE_BINDING_TABLE_EDIT_VS,
+   _3DSTATE_BINDING_TABLE_EDIT_GS,
+   _3DSTATE_BINDING_TABLE_EDIT_PS,
+};
 /**
  * Upload a shader stage's binding table as indirect state.
  *
@@ -166,6 +171,41 @@ const struct brw_tracked_state brw_gs_binding_table = {
  * Hardware-generated binding tables for the resource streamer
  */
 void
+gen7_update_binding_table(struct brw_context *brw,
+                          gl_shader_stage stage,
+                          uint32_t index,
+                          uint32_t surf_offset)
+{
+   assert(stage <= MESA_SHADER_FRAGMENT);
+
+   BEGIN_BATCH(3);
+   OUT_BATCH(stage_to_bt_edit[stage] << 16 | (3 - 2));
+   OUT_BATCH(0x3);
+   OUT_BATCH(index << 16 | (surf_offset >> 5));
+   ADVANCE_BATCH();
+}
+
+/**
+ * Hardware-generated binding tables for the resource streamer
+ */
+void
+gen7_update_binding_table_from_array(struct brw_context *brw,
+                                     gl_shader_stage stage,
+                                     const uint32_t* binding_table,
+                                     int size)
+{
+   assert(stage <= MESA_SHADER_FRAGMENT);
+
+   BEGIN_BATCH(size + 2);
+   OUT_BATCH(stage_to_bt_edit[stage] << 16 | size);
+   OUT_BATCH(0x3);
+   for (int i = 0; i < size; i++) {
+      OUT_BATCH(i << 16 | binding_table[i] >> 5);
+   }
+   ADVANCE_BATCH();
+}
+
+void
 gen7_disable_hw_binding_tables(struct brw_context *brw)
 {
    BEGIN_BATCH(3);
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index ba62811..3f31a6f 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1574,6 +1574,11 @@ enum brw_message_target {
 
 #define _3DSTATE_BINDING_TABLE_POOL_ALLOC       0x7919 /* GEN7.5+ */
 # define HSW_BINDING_TABLE_ALLOC_OFFSET         0x860  /* GEN7.5+ */
+#define _3DSTATE_BINDING_TABLE_EDIT_VS          0x7843 /* GEN7.5 */
+#define _3DSTATE_BINDING_TABLE_EDIT_GS          0x7844 /* GEN7.5 */
+#define _3DSTATE_BINDING_TABLE_EDIT_HS          0x7845 /* GEN7.5 */
+#define _3DSTATE_BINDING_TABLE_EDIT_DS          0x7846 /* GEN7.5 */
+#define _3DSTATE_BINDING_TABLE_EDIT_PS          0x7847 /* GEN7.5 */
 
 #define _3DSTATE_SAMPLER_STATE_POINTERS		0x7802 /* GEN6+ */
 # define PS_SAMPLER_STATE_CHANGE				(1 << 12)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index bbbf4a4..f985a3a 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -297,6 +297,15 @@ gen8_upload_constant_state(struct brw_context *brw,
                            bool active, unsigned opcode);
 /* gen7_misc_state.c */
 void gen7_rs_control(struct brw_context *brw, int enable);
+
+void gen7_update_binding_table(struct brw_context *brw,
+                               gl_shader_stage stage,
+                               uint32_t index,
+                               uint32_t surf_offset);
+void gen7_update_binding_table_from_array(struct brw_context *brw,
+                                          gl_shader_stage stage,
+                                          const uint32_t* binding_table,
+                                          int size);
 void gen7_enable_hw_binding_tables(struct brw_context *brw);
 void gen7_disable_hw_binding_tables(struct brw_context *brw);
 void gen7_reset_rs_pool_offsets(struct brw_context *brw);
-- 
1.9.1