[Mesa-dev] [PATCH 16/16] i965: Convert CMP.GE -(abs)reg 0 -> CMP.Z reg 0.

Ian Romanick idr at freedesktop.org
Mon Jan 19 20:08:40 PST 2015


On 01/19/2015 03:31 PM, Matt Turner wrote:
> total instructions in shared programs: 5952059 -> 5951603 (-0.01%)
> instructions in affected programs:     138812 -> 138356 (-0.33%)
> GAINED:                                1
> LOST:                                  0

Does the "glsl: Rewrite (-abs(x) >= 0) as (x == 0)" patch in my
bool-optimizations-v2 tree achieve the same thing?

> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp   | 12 ++++++++++++
>  src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 ++++++++++++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 994d457..ac6fe33 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -2365,6 +2365,18 @@ fs_visitor::opt_algebraic()
>              break;
>           }
>           break;
> +      case BRW_OPCODE_CMP:
> +         if (inst->conditional_mod == BRW_CONDITIONAL_GE &&
> +             inst->src[0].abs &&
> +             inst->src[0].negate &&
> +             inst->src[1].is_zero()) {
> +            inst->src[0].abs = false;
> +            inst->src[0].negate = false;
> +            inst->conditional_mod = BRW_CONDITIONAL_Z;
> +            progress = true;
> +            break;
> +         }
> +         break;
>        case BRW_OPCODE_SEL:
>           if (inst->src[0].equals(inst->src[1])) {
>              inst->opcode = BRW_OPCODE_MOV;
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index 0fac949..8988196 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -693,6 +693,18 @@ vec4_visitor::opt_algebraic()
>  	    progress = true;
>  	 }
>  	 break;
> +      case BRW_OPCODE_CMP:
> +         if (inst->conditional_mod == BRW_CONDITIONAL_GE &&
> +             inst->src[0].abs &&
> +             inst->src[0].negate &&
> +             inst->src[1].is_zero()) {
> +            inst->src[0].abs = false;
> +            inst->src[0].negate = false;
> +            inst->conditional_mod = BRW_CONDITIONAL_Z;
> +            progress = true;
> +            break;
> +         }
> +         break;
>        case SHADER_OPCODE_RCP: {
>           vec4_instruction *prev = (vec4_instruction *)inst->prev;
>           if (prev->opcode == SHADER_OPCODE_SQRT) {
> 



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