[Mesa-dev] [PATCH 10/16] i965/fs: Eliminate null-dst instructions without side-effects.
Kenneth Graunke
kenneth at whitecape.org
Tue Jan 20 12:51:33 PST 2015
On Tuesday, January 20, 2015 10:13:09 AM Matt Turner wrote:
> On Tue, Jan 20, 2015 at 12:53 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
> > On Monday, January 19, 2015 03:31:09 PM Matt Turner wrote:
> >> ---
> >> src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 11 +++++++++++
> >> 1 file changed, 11 insertions(+)
> >>
> >> diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
> >> index 81be4de..d66808b 100644
> >> --- a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
> >> +++ b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
> >> @@ -85,6 +85,17 @@ fs_visitor::dead_code_eliminate()
> >> }
> >> }
> >>
> >> + if ((inst->opcode != BRW_OPCODE_IF &&
> >> + inst->opcode != BRW_OPCODE_WHILE) &&
> >> + inst->dst.is_null() &&
> >> + !inst->has_side_effects() &&
> >> + !inst->writes_flag() &&
> >> + !inst->writes_accumulator) {
> >> + inst->opcode = BRW_OPCODE_NOP;
> >> + progress = true;
> >> + continue;
> >> + }
> >> +
> >> if (inst->dst.file == GRF) {
> >> if (!inst->is_partial_write()) {
> >> int var = live_intervals->var_from_reg(inst->dst);
> >>
> >
> > Seems like these should be handled too...
> >
> > - BRW_OPCODE_ELSE
> > - FS_OPCODE_DISCARD_JUMP
> > - FS_OPCODE_PLACEHOLDER_HALT
> > - SHADER_OPCODE_SHADER_TIME_ADD
>
> These have BAD_FILE destinations.
Oh, my mistake - I confused BAD_FILE and ARF NULL for a moment.
You're right, of course.
> > - SHADER_OPCODE_GEN4_SCRATCH_READ
> > - SHADER_OPCODE_GEN4_SCRATCH_WRITE
> > - SHADER_OPCODE_GEN7_SCRATCH_READ
>
> The READs have non-null destinations (they have to return the data somewhere).
Right. I was thinking about scratch, and just pasted all the opcodes...oops.
> And we only emit SCRATCH_* from spilling registers as part of register
> allocation. We can't ever call dead code elimination after we've
> assigned registers. (Not only do we not, but it couldn't work)
That makes sense. However, in the vec4 backend, we do emit scratch reads
and writes prior to optimization - in move_grf_array_access_to_scratch().
I've been meaning to port that over to the scalar backend. At which
point, SHADER_OPCODE_GEN4_SCRATCH_WRITE would be a problem.
But it's not yet, so,
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
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