[Mesa-dev] [PATCH] i965: Add a brw_fs_cmod_propagation unit test with large VGRF writes.
Kenneth Graunke
kenneth at whitecape.org
Fri Jan 23 15:30:54 PST 2015
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
.../drivers/dri/i965/test_fs_cmod_propagation.cpp | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
Yep, that is indeed broken, and my proposed code fixes it.
Here's a unit test that provokes the problem. Thanks for putting together
the unit tests - they're quite handy!
diff --git a/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp b/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
index d5d7b58..cc184aa 100644
--- a/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
@@ -375,3 +375,43 @@ TEST_F(cmod_propagation_test, movnz)
EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
}
+
+TEST_F(cmod_propagation_test, intervening_dest_write)
+{
+ fs_reg dest = v->vgrf(glsl_type::vec4_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ fs_reg src2 = v->vgrf(glsl_type::vec2_type);
+ fs_reg zero(0.0f);
+ v->emit(BRW_OPCODE_ADD, offset(dest, 2), src0, src1);
+ v->emit(SHADER_OPCODE_TEX, dest, src2)
+ ->regs_written = 4;
+ v->emit(BRW_OPCODE_CMP, v->reg_null_f, offset(dest, 2), zero)
+ ->conditional_mod = BRW_CONDITIONAL_GE;
+
+ /* = Before =
+ *
+ * 0: add(8) dest+2 src0 src1
+ * 1: tex(8) rlen 4 dest+0 src2
+ * 2: cmp.ge.f0(8) null dest+2 0.0f
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_FALSE(cmod_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
+ EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode);
+ EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
+ EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
+ EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
+}
--
2.2.2
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