[Mesa-dev] [RFC] glsl: Recognize pattern for roundEven().

[Ian Romanick]

On 01/28/2015 02:04 PM, Matt Turner wrote:
> On Wed, Jan 28, 2015 at 1:53 PM, Ian Romanick <idr at freedesktop.org> wrote:
>> On 01/28/2015 11:51 AM, Matt Turner wrote:
>>> What I'm asking is whether we suspect that they specifically want
>>> half-up behavior (speculation, so not likely insightful), or if
>>> there's a way we can emulate round-half-up behavior using round-even
>>> in fewer than four instructions.
>>
>> They may or may not want half-up or round-even or something else.  If we
>> change it, someone will see different pixels, and they will probably
>> report a bug.  It seems better to play it safe.
> 
> It's interesting to note [0] that floor(x + 0.5) fails to give the
> proper result (0.0) for the largest value smaller than 0.5 (in doubles
> and floats). So what they've given us isn't even half-up technically.
> 
> [0] http://ericlippert.com/2013/05/16/spot-the-defect-rounding-part-two/

But... it will produce the same "wrong" result on all GPUs.  My guess is
that's the actual goal.  The GLSL spec says round() does "something"
with x.5, and I suspect the HLSL documentation says something similar.
On older version of the language that didn't have roundEven(),
developers probably just wanted something consistent.

I don't think the original code handles -0 correctly either.  I wouldn't
expect myRound(-0.0) to give +0.  That's an awfully fine hair to split,
I guess.

>> I think 'round(x + (intToFloatBits(floatToIntBits(.5) |
>> (floatToIntBits(x) & 0x80000000))))' should produce the same result.
>> That should be 4 instructions, I think.

My code above incorrectly says round instead of trunc.

> Yeah, that's the four instruction sequence I was thinking of.
> 
>> Were you thinking of using CSEL
>> for your 4 instruction version?
> 
> I'm not sure. You must be a step ahead of me. Where could we use CSEL?

Something like trunc(x + mix(.5, -.5, sign(x) < 0.0)).  I guess that
would probably be 5 instructions due to loading .5 into a register.