[Mesa-dev] [PATCH 05/10] i965: Move tex miptree and format resolving into dispatcher

Topi Pohjolainen topi.pohjolainen at intel.com
Wed Jul 1 04:46:35 PDT 2015


All hardware platforms have this in common, so do it in the
hardware independent dispatcher.

v2 (Matt): Removed extra whitespace.
v3: Non-trivial rebase

Reviewed-by: Matt Turner <mattst88 at gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org> (v1)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h           |  4 +++-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 26 ++++++++++++++++-------
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 10 +++------
 src/mesa/drivers/dri/i965/gen8_surface_state.c    | 14 +++---------
 4 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index da018bf..ef9bb87 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -981,7 +981,9 @@ struct brw_context
    struct
    {
       void (*update_texture_surface)(struct gl_context *ctx,
-                                     unsigned unit,
+                                     const struct intel_mipmap_tree *mt,
+                                     struct gl_texture_object *tex_obj,
+                                     uint32_t tex_format,
                                      uint32_t *surf_offset,
                                      bool for_gather);
       uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 26e9122..c14f00a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -308,23 +308,19 @@ brw_update_buffer_texture_surface(struct brw_context *brw,
 
 static void
 brw_update_texture_surface(struct gl_context *ctx,
-                           unsigned unit,
+                           const struct intel_mipmap_tree *mt,
+                           struct gl_texture_object *tObj,
+                           uint32_t tex_format,
                            uint32_t *surf_offset,
                            bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    uint32_t *surf;
 
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
 			  6 * 4, 32, surf_offset);
 
-   uint32_t tex_format = translate_tex_format(brw, intelObj->_Format,
-                                              sampler->sRGBDecode);
-
    if (for_gather) {
       /* Sandybridge's gather4 message is broken for integer formats.
        * To work around this, we pretend the surface is UNORM for
@@ -828,8 +824,22 @@ update_stage_texture_surfaces(struct brw_context *brw,
          continue;
       }
 
+      const struct gl_texture_image *first_img = tex->Image[0][tex->BaseLevel];
+      const struct intel_texture_object *itex = intel_texture_object(tex);
+      const struct intel_mipmap_tree *mt = itex->mt;
+      const struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx,
+                                                                     unit);
+      uint32_t format = translate_tex_format(brw, itex->_Format,
+                                             sampler->sRGBDecode);
+
+      if (tex->StencilSampling && first_img->_BaseFormat == GL_DEPTH_STENCIL) {
+         mt = mt->stencil_mt;
+         format = BRW_SURFACEFORMAT_R8_UINT;
+         assert(brw->gen >= 8);
+      }
+
       /* _NEW_TEXTURE */
-      brw->vtbl.update_texture_surface(ctx, unit,
+      brw->vtbl.update_texture_surface(ctx, mt, tex, format,
                                        surf_offset + s, for_gather);
    }
 }
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 6aa8299..26d080f 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -349,20 +349,19 @@ gen7_emit_texture_surface_state(struct brw_context *brw,
 
 static void
 gen7_update_texture_surface(struct gl_context *ctx,
-                            unsigned unit,
+                            const struct intel_mipmap_tree *mt,
+                            struct gl_texture_object *obj,
+                            uint32_t format,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
 
    if (obj->Target == GL_TEXTURE_BUFFER) {
       brw_update_buffer_texture_surface(brw, obj, surf_offset);
 
    } else {
       struct intel_texture_object *intel_obj = intel_texture_object(obj);
-      struct intel_mipmap_tree *mt = intel_obj->mt;
-      struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
       /* If this is a view with restricted NumLayers, then our effective depth
        * is not just the miptree depth.
        */
@@ -380,9 +379,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
       const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
                                 brw_get_texture_swizzle(&brw->ctx, obj));
 
-      unsigned format = translate_tex_format(
-         brw, intel_obj->_Format, sampler->sRGBDecode);
-
       if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT)
          format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
 
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 11defd1..b6766ef 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -300,12 +300,13 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
 
 static void
 gen8_update_texture_surface(struct gl_context *ctx,
-                            unsigned unit,
+                            const struct intel_mipmap_tree *mt,
+                            struct gl_texture_object *obj,
+                            uint32_t format,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
 
    if (obj->Target == GL_TEXTURE_BUFFER) {
       brw_update_buffer_texture_surface(brw, obj, surf_offset);
@@ -313,8 +314,6 @@ gen8_update_texture_surface(struct gl_context *ctx,
    } else {
       struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel];
       struct intel_texture_object *intel_obj = intel_texture_object(obj);
-      struct intel_mipmap_tree *mt = intel_obj->mt;
-      struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
       /* If this is a view with restricted NumLayers, then our effective depth
        * is not just the miptree depth.
        */
@@ -331,13 +330,6 @@ gen8_update_texture_surface(struct gl_context *ctx,
       const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
                                 brw_get_texture_swizzle(&brw->ctx, obj));
 
-      unsigned format = translate_tex_format(brw, intel_obj->_Format,
-                                             sampler->sRGBDecode);
-      if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
-         mt = mt->stencil_mt;
-         format = BRW_SURFACEFORMAT_R8_UINT;
-      }
-
       gen8_emit_texture_surface_state(brw, mt, obj->Target,
                                       obj->MinLayer, obj->MinLayer + depth,
                                       obj->MinLevel + obj->BaseLevel,
-- 
1.9.3



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