[Mesa-dev] [PATCH] i965: allocate at least 1 BLEND_STATE element

[Chris Forbes]

Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>

On Thu, Jul 2, 2015 at 4:16 AM, Mike Stroyan <mike at lunarg.com> wrote:
> When there are no color buffer render targets, gen6 and gen7 still
> use the first BLEND_STATE element to determine alpha test.
> gen6_upload_blend_state was allocating zero elements when
> ctx->Color.AlphaEnabled was false.
> That left _3DSTATE_CC_STATE_POINTERS or _3DSTATE_BLEND_STATE_POINTERS
> pointing to random data from some previous brw_state_batch().
> That sometimes suppressed depth rendering when those bits
> happened to mean COMPAREFUNC_NEVER.
> This produced flickering shadows for dota2 reborn.
> ---
>  src/mesa/drivers/dri/i965/gen6_cc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
> index 2bfa271..2b76e24 100644
> --- a/src/mesa/drivers/dri/i965/gen6_cc.c
> +++ b/src/mesa/drivers/dri/i965/gen6_cc.c
> @@ -51,7 +51,7 @@ gen6_upload_blend_state(struct brw_context *brw)
>      * with render target 0, which will reference BLEND_STATE[0] for
>      * alpha test enable.
>      */
> -   if (nr_draw_buffers == 0 && ctx->Color.AlphaEnabled)
> +   if (nr_draw_buffers == 0)
>        nr_draw_buffers = 1;
>
>     size = sizeof(*blend) * nr_draw_buffers;
> --
> 2.1.0
>
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