[Mesa-dev] [PATCH] i965/cs: Initialize GPGPU Thread Count
Jordan Justen
jordan.l.justen at intel.com
Thu Jul 2 23:32:03 PDT 2015
On 2015-06-25 11:34:59, Ben Widawsky wrote:
> On Thu, Jun 11, 2015 at 09:04:45PM -0700, Jordan Justen wrote:
> > + desc[dw++] = 0;
> > + const uint32_t media_threads =
> > + brw->gen >= 8 ?
> > + SET_FIELD(threads, GEN8_MEDIA_GPGPU_THREAD_COUNT) :
> > + SET_FIELD(threads, MEDIA_GPGPU_THREAD_COUNT);
> > + desc[dw++] = media_threads;
>
> What's the deal with, "The maximum value for global barriers is limited by the
> number of threads in the system, or by 511," Can we add an assert?
I guess we are using a local barrier, so "the maximum value is the
number of threads in a subslice for local barriers".
How about I add assert(threads <= brw->max_cs_threads)? Although, in
brw_compute:brw_emit_gpgpu_walker we have a similar assertion.
-Jordan
> >
> > BEGIN_BATCH(4);
> > OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2));
> > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> > index f6da305..2a8f500 100644
> > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > @@ -2495,6 +2495,11 @@ enum brw_wm_barycentric_interp_mode {
> > # define MEDIA_VFE_STATE_CURBE_ALLOC_MASK INTEL_MASK(15, 0)
> >
> > #define MEDIA_INTERFACE_DESCRIPTOR_LOAD 0x7002
> > +/* GEN7 DW5, GEN8+ DW6 */
> > +# define MEDIA_GPGPU_THREAD_COUNT_SHIFT 0
> > +# define MEDIA_GPGPU_THREAD_COUNT_MASK INTEL_MASK(7, 0)
> > +# define GEN8_MEDIA_GPGPU_THREAD_COUNT_SHIFT 0
> > +# define GEN8_MEDIA_GPGPU_THREAD_COUNT_MASK INTEL_MASK(9, 0)
> > #define MEDIA_STATE_FLUSH 0x7004
> > #define GPGPU_WALKER 0x7105
> > /* GEN8+ DW2 */
> > --
> > 2.1.4
> >
> > _______________________________________________
> > mesa-dev mailing list
> > mesa-dev at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/mesa-dev
More information about the mesa-dev
mailing list