[Mesa-dev] [PATCH] i965: add support for ARB_shader_subroutine
Dave Airlie
airlied at gmail.com
Thu Jul 23 00:41:51 PDT 2015
From: Dave Airlie <airlied at redhat.com>
This just adds some missing pieces to nir/i965,
it is lightly tested on my Haswell.
Signed-off-by: Dave Airlie <airlied at redhat.com>
---
docs/GL3.txt | 2 +-
docs/relnotes/10.7.0.html | 2 +-
src/glsl/glsl_types.cpp | 4 ++--
src/glsl/nir/glsl_to_nir.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 7 +++++++
src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++
9 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 2cf5c31..85d5784 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -111,7 +111,7 @@ GL 4.0, GLSL 4.00:
- New overload resolution rules DONE
GL_ARB_gpu_shader_fp64 DONE (nvc0, radeonsi, llvmpipe, softpipe)
GL_ARB_sample_shading DONE (i965, nv50, nvc0, r600, radeonsi)
- GL_ARB_shader_subroutine DONE (nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
+ GL_ARB_shader_subroutine DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_tessellation_shader DONE (radeonsi)
GL_ARB_texture_buffer_object_rgb32 DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_cube_map_array DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
diff --git a/docs/relnotes/10.7.0.html b/docs/relnotes/10.7.0.html
index 1464dc4..ff5a5f1 100644
--- a/docs/relnotes/10.7.0.html
+++ b/docs/relnotes/10.7.0.html
@@ -50,7 +50,7 @@ Note: some of the new features are only available with certain drivers.
<li>GL_ARB_get_texture_sub_image for all drivers</li>
<li>GL_ARB_gpu_shader_fp64 on llvmpipe, radeonsi</li>
<li>GL_ARB_shader_stencil_export on llvmpipe</li>
-<li>GL_ARB_shader_subroutine on core profile gallium drivers</li>
+<li>GL_ARB_shader_subroutine on core profile all drivers</li>
<li>GL_ARB_tessellation_shader on radeonsi</li>
<li>GL_ARB_vertex_attrib_64bit on llvmpipe, radeonsi</li>
<li>GL_ARB_viewport_array on radeonsi</li>
diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl_types.cpp
index 8510671..755618a 100644
--- a/src/glsl/glsl_types.cpp
+++ b/src/glsl/glsl_types.cpp
@@ -1027,11 +1027,11 @@ glsl_type::component_slots() const
case GLSL_TYPE_IMAGE:
return 1;
-
+ case GLSL_TYPE_SUBROUTINE:
+ return 1;
case GLSL_TYPE_SAMPLER:
case GLSL_TYPE_ATOMIC_UINT:
case GLSL_TYPE_VOID:
- case GLSL_TYPE_SUBROUTINE:
case GLSL_TYPE_ERROR:
break;
}
diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 66430f3..77327b6 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -1171,6 +1171,7 @@ nir_visitor::visit(ir_expression *ir)
case ir_unop_bitcast_f2i:
case ir_unop_bitcast_u2f:
case ir_unop_bitcast_f2u:
+ case ir_unop_subroutine_to_int:
/* no-op */
emit(nir_op_imov, dest_size, srcs);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 9af1537..7f25a21 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -481,6 +481,8 @@ fs_visitor::type_size(const struct glsl_type *type)
return 0;
case GLSL_TYPE_ATOMIC_UINT:
return 0;
+ case GLSL_TYPE_SUBROUTINE:
+ return 1;
case GLSL_TYPE_IMAGE:
case GLSL_TYPE_VOID:
case GLSL_TYPE_ERROR:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
index d0f6122..a8883a3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
@@ -243,6 +243,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir)
case ir_unop_find_msb:
case ir_unop_find_lsb:
case ir_unop_saturate:
+ case ir_unop_subroutine_to_int:
for (i = 0; i < vector_elements; i++) {
ir_rvalue *op0 = get_element(op_var[0], i);
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 9d60543..703e9aa 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -430,6 +430,7 @@ brw_type_for_base_type(const struct glsl_type *type)
return BRW_REGISTER_TYPE_F;
case GLSL_TYPE_INT:
case GLSL_TYPE_BOOL:
+ case GLSL_TYPE_SUBROUTINE:
return BRW_REGISTER_TYPE_D;
case GLSL_TYPE_UINT:
return BRW_REGISTER_TYPE_UD;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index a6eee47..6fee798 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -603,6 +603,9 @@ type_size(const struct glsl_type *type)
size += type_size(type->fields.structure[i].type);
}
return size;
+ case GLSL_TYPE_SUBROUTINE:
+ return 1;
+
case GLSL_TYPE_SAMPLER:
/* Samplers take up no register space, since they're baked in at
* link time.
@@ -1558,6 +1561,10 @@ vec4_visitor::visit(ir_expression *ir)
case ir_unop_noise:
unreachable("not reached: should be handled by lower_noise");
+ case ir_unop_subroutine_to_int:
+ emit(MOV(result_dst, op[0]));
+ break;
+
case ir_binop_add:
emit(ADD(result_dst, op[0], op[1]));
break;
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index 6b3bd12..4a0ffff 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -311,6 +311,7 @@ intelInitExtensions(struct gl_context *ctx)
* slightly differently when the extension is enabled.
*/
if (ctx->API == API_OPENGL_CORE) {
+ ctx->Extensions.ARB_shader_subroutine = true;
ctx->Extensions.ARB_viewport_array = true;
ctx->Extensions.AMD_vertex_shader_viewport_index = true;
}
@@ -343,6 +344,7 @@ intelInitExtensions(struct gl_context *ctx)
if (ctx->API == API_OPENGL_CORE) {
ctx->Extensions.ARB_viewport_array = true;
ctx->Extensions.AMD_vertex_shader_viewport_index = true;
+ ctx->Extensions.ARB_shader_subroutine = true;
}
}
--
2.4.3
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