[Mesa-dev] [PATCH v2 21/78] i965/nir/vec4: Implement store_output intrinsic

[Eduardo Lima Mitev]

The destination register from the instruction is stored in the output_reg
variable at its original varying value. From there, vec4_visitor's
emit_urb_slot() will pick it up and continue the URB setup code, so that
part is shared.

This implementation expects that const_index[0] of the instrinsic instruction
stores the shader variable location (not the calculated driver_location).

The driver_location is not used at all so this patch also disables the
nir_assign_var_locations pass on non-scalar shaders.
---
 src/mesa/drivers/dri/i965/brw_nir.c        |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 21 +++++++++++++++++++--
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index b241121..1164984 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -106,13 +106,13 @@ brw_create_nir(struct brw_context *brw,
                                             &nir->num_direct_uniforms,
                                             &nir->num_uniforms,
                                             is_scalar);
+      nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
    } else {
       nir_assign_var_locations(&nir->uniforms,
                                &nir->num_uniforms,
                                is_scalar);
    }
    nir_assign_var_locations(&nir->inputs, &nir->num_inputs, is_scalar);
-   nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
 
    nir_lower_io(nir, is_scalar);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 4dd2194..740cc61 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -474,10 +474,27 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
    }
 
    case nir_intrinsic_store_output_indirect:
+      has_indirect = true;
       /* fallthrough */
-   case nir_intrinsic_store_output:
-      /* @TODO: Not yet implemented */
+   case nir_intrinsic_store_output: {
+      /* Here we need the original variable's varying value, which is stored
+       * by nir_lower_io in const_index[0] of the store_output intrinsic
+       * instruction for non-scalar backends like we are.
+       */
+      int varying = instr->const_index[0];
+
+      src = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_F,
+                        instr->num_components);
+      dest = dst_reg(src);
+
+      if (has_indirect) {
+         dest.reladdr = new(mem_ctx) src_reg(get_nir_src(instr->src[1],
+                                                         BRW_REGISTER_TYPE_D,
+                                                         1));
+      }
+      output_reg[varying] = dest;
       break;
+   }
 
    case nir_intrinsic_load_vertex_id:
       unreachable("should be lowered by lower_vertex_id()");
-- 
2.1.4