[Mesa-dev] [PATCH 3/4] radeonsi: add fine derivate control

[Marek Olšák]

On Wed, Jul 22, 2015 at 12:51 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> This adds support for fine derivatives and enables
> ARB_derivative_control on radeonsi.
>
> (just fell out of my working out interpolation)
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  docs/GL3.txt                             |  2 +-
>  docs/relnotes/10.7.0.html                |  1 +
>  src/gallium/drivers/radeonsi/si_pipe.c   |  5 +++--
>  src/gallium/drivers/radeonsi/si_shader.c | 20 ++++++++++++++++----
>  4 files changed, 21 insertions(+), 7 deletions(-)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index 33a282e..4f6c415 100644
> --- a/docs/GL3.txt
> +++ b/docs/GL3.txt
> @@ -191,7 +191,7 @@ GL 4.5, GLSL 4.50:
>    GL_ARB_clip_control                                  DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
>    GL_ARB_conditional_render_inverted                   DONE (i965, nv50, nvc0, llvmpipe, softpipe)
>    GL_ARB_cull_distance                                 in progress (Tobias)
> -  GL_ARB_derivative_control                            DONE (i965, nv50, nvc0, r600)
> +  GL_ARB_derivative_control                            DONE (i965, nv50, nvc0, r600, radeonsi)
>    GL_ARB_direct_state_access                           DONE (all drivers)
>    - Transform Feedback object                          DONE
>    - Buffer object                                      DONE
> diff --git a/docs/relnotes/10.7.0.html b/docs/relnotes/10.7.0.html
> index 42ea807..a69971f 100644
> --- a/docs/relnotes/10.7.0.html
> +++ b/docs/relnotes/10.7.0.html
> @@ -45,6 +45,7 @@ Note: some of the new features are only available with certain drivers.
>
>  <ul>
>  <li>GL_AMD_vertex_shader_viewport_index on radeonsi</li>
> +<li>GL_ARB_derivative_control on radeonsi</li>
>  <li>GL_ARB_fragment_layer_viewport on radeonsi</li>
>  <li>GL_ARB_framebuffer_no_attachments on i965</li>
>  <li>GL_ARB_gpu_shader_fp64 on llvmpipe, radeonsi</li>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 2b6a6ff..f725677 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -284,7 +284,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>                 return HAVE_LLVM >= 0x0305;
>         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
>                 return HAVE_LLVM >= 0x0305 ? 4 : 0;
> -
> +       case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
> +               return 1;

This should be in the group of caps at the beginning that all return 1.

>         /* Unsupported features. */
>         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
>         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
> @@ -293,7 +294,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>         case PIPE_CAP_USER_VERTEX_BUFFERS:
>         case PIPE_CAP_FAKE_SW_MSAA:
>         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
> -       case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
> +
>         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:

No need to add an empty line here.

>         case PIPE_CAP_SAMPLER_VIEW_TARGET:
>         case PIPE_CAP_VERTEXID_NOBASE:
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index f23eaa4..c5d80f0 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -2203,7 +2203,8 @@ static void si_llvm_emit_ddxy(
>         LLVMTypeRef i32;
>         unsigned swizzle[4];
>         unsigned c;
> -
> +       int idx;
> +       unsigned mask;
>         i32 = LLVMInt32TypeInContext(gallivm->context);
>
>         indices[0] = bld_base->uint_bld.zero;
> @@ -2212,14 +2213,21 @@ static void si_llvm_emit_ddxy(
>         store_ptr = LLVMBuildGEP(gallivm->builder, si_shader_ctx->ddxy_lds,
>                                  indices, 2, "");
>
> +       if (opcode == TGSI_OPCODE_DDX_FINE)
> +               mask = 0xfffffffe;
> +       else if (opcode == TGSI_OPCODE_DDY_FINE)
> +               mask = 0xfffffffd;
> +       else
> +               mask = 0xfffffffc;
>         indices[1] = LLVMBuildAnd(gallivm->builder, indices[1],
> -                                 lp_build_const_int32(gallivm, 0xfffffffc), "");
> +                                 lp_build_const_int32(gallivm, mask), "");
>         load_ptr0 = LLVMBuildGEP(gallivm->builder, si_shader_ctx->ddxy_lds,
>                                  indices, 2, "");
>
> +       idx = (opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE) ? 1 :2;
>         indices[1] = LLVMBuildAdd(gallivm->builder, indices[1],
>                                   lp_build_const_int32(gallivm,
> -                                                      opcode == TGSI_OPCODE_DDX ? 1 : 2),
> +                                                      idx),

I wish I knew how this works. It certainly deserves a comment
explaining it. Without that, I think only Michel can review it.

Marek