[Mesa-dev] [PATCH 2/2] radeonsi: ubo indexing support

[Marek Olšák]

On Wed, Jul 22, 2015 at 3:27 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> This is required as part of ARB_gpu_shader5.
>
> no backend changes are required for this, or if
> any are, it's the same ones as for samplers.
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  docs/GL3.txt                             |  2 +-
>  src/gallium/drivers/radeonsi/si_shader.c | 17 ++++++++++++++---
>  2 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index ca3646c..7a5e987 100644
> --- a/docs/GL3.txt
> +++ b/docs/GL3.txt
> @@ -99,7 +99,7 @@ GL 4.0, GLSL 4.00:
>    GL_ARB_gpu_shader5                                   DONE (i965, nvc0)
>    - 'precise' qualifier                                DONE
>    - Dynamically uniform sampler array indices          DONE (r600, radeonsi, softpipe)
> -  - Dynamically uniform UBO array indices              DONE (r600)
> +  - Dynamically uniform UBO array indices              DONE (r600, radeonsi)
>    - Implicit signed -> unsigned conversions            DONE
>    - Fused multiply-add                                 DONE ()
>    - Packing/bitfield/conversion functions              DONE (r600, radeonsi, softpipe)
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 55357fa..07a7c20 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -708,9 +708,10 @@ static LLVMValueRef fetch_constant(
>         struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
>         struct lp_build_context * base = &bld_base->base;
>         const struct tgsi_ind_register *ireg = &reg->Indirect;
> +       const struct tgsi_ind_register *direg = &reg->DimIndirect;
>         unsigned buf, idx;
>
> -       LLVMValueRef addr;
> +       LLVMValueRef addr, bufp;
>         LLVMValueRef result;
>
>         if (swizzle == LP_CHAN_ALL) {
> @@ -725,7 +726,7 @@ static LLVMValueRef fetch_constant(
>         buf = reg->Register.Dimension ? reg->Dimension.Index : 0;
>         idx = reg->Register.Index * 4 + swizzle;
>
> -       if (!reg->Register.Indirect) {
> +       if (!reg->Register.Indirect && !reg->Dimension.Indirect) {
>                 if (type != TGSI_TYPE_DOUBLE)
>                         return bitcast(bld_base, type, si_shader_ctx->constants[buf][idx]);
>                 else {
> @@ -735,13 +736,23 @@ static LLVMValueRef fetch_constant(
>                 }
>         }
>
> +       if (reg->Register.Dimension && reg->Dimension.Indirect) {
> +               LLVMValueRef ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST);
> +               addr = si_shader_ctx->radeon_bld.soa.addr[direg->Index][direg->Swizzle];
> +               addr = LLVMBuildLoad(base->gallivm->builder, addr, "indirect load reg");
> +               addr = lp_build_add(&bld_base->uint_bld, addr,
> +                                   lp_build_const_int32(base->gallivm, reg->Dimension.Index));

Can get_indirect_index be used here instead of open-coding it?

Marek