[Mesa-dev] [PATCH 1/2] radeonsi: add support for indirect samplers
Dave Airlie
airlied at gmail.com
Thu Jul 23 21:43:32 PDT 2015
>
>> +
>> static void tex_fetch_args(
>> struct lp_build_tgsi_context * bld_base,
>> struct lp_build_emit_data * emit_data)
>> @@ -1640,10 +1658,36 @@ static void tex_fetch_args(
>> unsigned num_coords = tgsi_util_get_texture_coord_dim(target, &ref_pos);
>> unsigned count = 0;
>> unsigned chan;
>> - unsigned sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
>> - unsigned sampler_index = emit_data->inst->Src[sampler_src].Register.Index;
>> + unsigned sampler_src;
>> + unsigned sampler_index;
>> bool has_offset = HAVE_LLVM >= 0x0305 ? inst->Texture.NumOffsets > 0 : false;
>> + bool has_sampler_indirect = false;
>> + LLVMValueRef res_ptr, samp_ptr;
>> +
>> + sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
>> + sampler_index = emit_data->inst->Src[sampler_src].Register.Index;
>> +
>> + if (emit_data->inst->Src[sampler_src].Register.Indirect) {
>> + const struct tgsi_full_src_register *reg = &emit_data->inst->Src[sampler_src];
>> + unsigned first = reg->Register.Index;
>> + LLVMValueRef ind_index;
>>
>> + ind_index = get_indirect_index(si_shader_ctx, ®->Indirect,
>> + reg->Register.Index - first);
>
> It looks like the last parameter is always 0. (first ==
> reg->Register.Index) Therefore, reg->Register.Index is unused. Is that
> the correct behavior?
Good point, I should just be passing reg->Register.Index here and
below, fixed in v2.
>> } else if (opcode == TGSI_OPCODE_TG4 ||
>> opcode == TGSI_OPCODE_LODQ ||
>> - has_offset) {
>> + has_offset || has_sampler_indirect) {
>
> Why is this here? This codepath doesn't support all sampler types and
> tex instructions yet.
Oh I put that in while I was debugging things to make it clearer what
was going on inside llvm (this intrinsic is much cleaner), turns out I
don't need it, this and the other one dropped in v2.
Thanks,
Dave.
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