[Mesa-dev] [PATCH v2 15/78] i965/nir/vec4: Add get_nir_dst() and get_nir_src() methods
Jason Ekstrand
jason at jlekstrand.net
Fri Jul 24 12:19:24 PDT 2015
On Thu, Jul 23, 2015 at 3:16 AM, Eduardo Lima Mitev <elima at igalia.com> wrote:
> These methods are essential for the implementation of the NIR->vec4 pass. They
> work similar to their fs_nir counter-parts.
>
> When processing instructions, these methods are invoked to resolve the
> brw registers (source or destination) corresponding to the NIR sources
> or destination. It uses the map of NIR register index to brw register for
> all registers locally allocated in a block.
>
> Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
> ---
> src/mesa/drivers/dri/i965/brw_vec4.h | 10 ++++
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 74 ++++++++++++++++++++++++++++++
> 2 files changed, 84 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
> index 83ac4c4..eb83dfc 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.h
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.h
> @@ -408,6 +408,16 @@ public:
> virtual void nir_emit_jump(nir_jump_instr *instr);
> virtual void nir_emit_texture(nir_tex_instr *instr);
>
> + dst_reg get_nir_dest(nir_dest dest, enum brw_reg_type type);
> + dst_reg get_nir_dest(nir_dest dest, nir_alu_type type);
> + dst_reg get_nir_dest(nir_dest dest);
> + src_reg get_nir_src(nir_src src, enum brw_reg_type type,
> + unsigned num_components = 4);
> + src_reg get_nir_src(nir_src src, nir_alu_type type,
> + unsigned num_components = 4);
> + src_reg get_nir_src(nir_src src,
> + unsigned num_components = 4);
> +
> virtual dst_reg *make_reg_for_system_value(int location,
> const glsl_type *type) = 0;
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index 4733b60..3259290 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -331,6 +331,80 @@ vec4_visitor::nir_emit_instr(nir_instr *instr)
> }
> }
>
> +static dst_reg
> +dst_reg_for_nir_reg(vec4_visitor *v, nir_register *nir_reg,
> + unsigned base_offset, nir_src *indirect)
> +{
> + dst_reg reg;
> +
> + reg = v->nir_locals[nir_reg->index];
> + reg = offset(reg, base_offset);
> + if (indirect) {
> + reg.reladdr =
> + new(v->mem_ctx) src_reg(v->get_nir_src(*indirect,
> + BRW_REGISTER_TYPE_D,
> + 1));
> + }
> + return reg;
> +}
> +
> +dst_reg
> +vec4_visitor::get_nir_dest(nir_dest dest)
> +{
> + return dst_reg_for_nir_reg(this, dest.reg.reg, dest.reg.base_offset,
> + dest.reg.indirect);
> +}
> +
> +dst_reg
> +vec4_visitor::get_nir_dest(nir_dest dest, enum brw_reg_type type)
> +{
> + dst_reg reg = get_nir_dest(dest);
> + return retype(reg, type);
This could be one line.
> +}
> +
> +dst_reg
> +vec4_visitor::get_nir_dest(nir_dest dest, nir_alu_type type)
> +{
> + dst_reg reg = get_nir_dest(dest);
> + return retype(reg, brw_type_for_nir_type(type));
This could just call get_nir_dest(nir_dest, brw_reg_type)
> +}
> +
> +src_reg
> +vec4_visitor::get_nir_src(nir_src src, enum brw_reg_type type,
> + unsigned num_components)
> +{
> + dst_reg reg;
> +
> + if (src.is_ssa) {
> + assert(src.ssa != NULL);
> + reg = nir_ssa_values[src.ssa->index];
> + }
> + else {
> + reg = dst_reg_for_nir_reg(this, src.reg.reg, src.reg.base_offset,
> + src.reg.indirect);
> + }
> +
> + reg = retype(reg, type);
> +
> + src_reg reg_as_src = src_reg(reg);
> + reg_as_src.swizzle = brw_swizzle_for_size(num_components);
> + return reg_as_src;
> +}
> +
> +src_reg
> +vec4_visitor::get_nir_src(nir_src src, nir_alu_type type,
> + unsigned num_components)
> +{
> + return get_nir_src(src, brw_type_for_nir_type(type), num_components);
> +}
> +
> +src_reg
> +vec4_visitor::get_nir_src(nir_src src, unsigned num_components)
> +{
> + /* if type is not specified, default to signed int */
> + return get_nir_src(src, nir_type_int, num_components);
> +}
> +
> void
> vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
> {
> --
> 2.1.4
>
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