[Mesa-dev] [PATCH 03/18] gallium/radeon: remove build_intrinsic and build_tgsi_intrinsic
Dave Airlie
airlied at gmail.com
Tue Jul 28 17:41:41 PDT 2015
On 28 July 2015 at 20:05, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
For 2 & 3,
Reviewed-by: Dave Airlie <airlied at redhat.com>
>
> duplicated now
> ---
> src/gallium/drivers/r600/r600_llvm.c | 34 +++++------
> src/gallium/drivers/radeon/radeon_llvm.h | 8 ---
> .../drivers/radeon/radeon_setup_tgsi_llvm.c | 68 +++++-----------------
> src/gallium/drivers/radeonsi/si_shader.c | 44 +++++++-------
> 4 files changed, 52 insertions(+), 102 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c
> index 15fc256..686c92c 100644
> --- a/src/gallium/drivers/r600/r600_llvm.c
> +++ b/src/gallium/drivers/r600/r600_llvm.c
> @@ -84,7 +84,7 @@ static void llvm_load_system_value(
> #else
> LLVMValueRef reg = lp_build_const_int32(
> ctx->soa.bld_base.base.gallivm, chan);
> - ctx->system_values[index] = build_intrinsic(
> + ctx->system_values[index] = lp_build_intrinsic(
> ctx->soa.bld_base.base.gallivm->builder,
> "llvm.R600.load.input",
> ctx->soa.bld_base.base.elem_type, ®, 1,
> @@ -111,9 +111,9 @@ llvm_load_input_vector(
> Args[ArgCount++] = LLVMBuildExtractElement(ctx->gallivm.builder, IJIndex,
> lp_build_const_int32(&(ctx->gallivm), 2 * (ijregs % 2) + 1), "");
> LLVMValueRef HalfVec[2] = {
> - build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.xy",
> + lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.xy",
> VecType, Args, ArgCount, LLVMReadNoneAttribute),
> - build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.zw",
> + lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.zw",
> VecType, Args, ArgCount, LLVMReadNoneAttribute)
> };
> LLVMValueRef MaskInputs[4] = {
> @@ -127,7 +127,7 @@ llvm_load_input_vector(
> Mask, "");
> } else {
> VecType = LLVMVectorType(ctx->soa.bld_base.base.elem_type, 4);
> - return build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.const",
> + return lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.const",
> VecType, Args, ArgCount, LLVMReadNoneAttribute);
> }
> }
> @@ -153,7 +153,7 @@ llvm_load_input_helper(
> arg_count = 1;
> }
>
> - return build_intrinsic(bb->gallivm->builder, intrinsic,
> + return lp_build_intrinsic(bb->gallivm->builder, intrinsic,
> bb->elem_type, &arg[0], arg_count, LLVMReadNoneAttribute);
> }
> #endif
> @@ -356,7 +356,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> args[0] = output;
> args[1] = lp_build_const_int32(base->gallivm, next_pos++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -373,7 +373,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> LLVMValueRef base_vector = llvm_load_const_buffer(bld_base, offset, CONSTANT_BUFFER_1_ADDR_SPACE);
> args[0] = output;
> args[1] = base_vector;
> - adjusted_elements[chan] = build_intrinsic(base->gallivm->builder,
> + adjusted_elements[chan] = lp_build_intrinsic(base->gallivm->builder,
> "llvm.AMDGPU.dp4", bld_base->base.elem_type,
> args, 2, LLVMReadNoneAttribute);
> }
> @@ -381,7 +381,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> adjusted_elements, 4);
> args[1] = lp_build_const_int32(base->gallivm, next_pos++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -394,14 +394,14 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> args[0] = output;
> args[1] = lp_build_const_int32(base->gallivm, next_pos++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> args, 3, 0);
> args[1] = lp_build_const_int32(base->gallivm, next_param++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -418,7 +418,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> args[0] = lp_build_gather_values(base->gallivm, elements, 4);
> args[1] = lp_build_const_int32(base->gallivm, next_param++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -430,7 +430,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> args[0] = output;
> args[1] = lp_build_const_int32(base->gallivm, next_param++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -449,7 +449,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> for (unsigned j = 0; j < ctx->color_buffer_count; j++) {
> args[1] = lp_build_const_int32(base->gallivm, j);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -458,7 +458,7 @@ static void llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
> } else {
> args[1] = lp_build_const_int32(base->gallivm, color_count++);
> args[2] = lp_build_const_int32(base->gallivm, V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL);
> - build_intrinsic(
> + lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.R600.store.swizzle",
> LLVMVoidTypeInContext(base->gallivm->context),
> @@ -543,7 +543,7 @@ static void llvm_emit_tex(
> case TGSI_OPCODE_TXF: {
> args[0] = LLVMBuildExtractElement(gallivm->builder, emit_data->args[0], lp_build_const_int32(gallivm, 0), "");
> args[1] = lp_build_const_int32(gallivm, R600_MAX_CONST_BUFFERS);
> - emit_data->output[0] = build_intrinsic(gallivm->builder,
> + emit_data->output[0] = lp_build_intrinsic(gallivm->builder,
> "llvm.R600.load.texbuf",
> emit_data->dst_type, args, 2, LLVMReadNoneAttribute);
> if (ctx->chip_class >= EVERGREEN)
> @@ -658,7 +658,7 @@ static void llvm_emit_tex(
> lp_build_const_int32(gallivm, 1),
> lp_build_const_int32(gallivm, 1)
> };
> - LLVMValueRef ptr = build_intrinsic(gallivm->builder,
> + LLVMValueRef ptr = lp_build_intrinsic(gallivm->builder,
> "llvm.R600.ldptr",
> emit_data->dst_type, ldptr_args, 10, LLVMReadNoneAttribute);
> LLVMValueRef Tmp = LLVMBuildExtractElement(gallivm->builder, args[0],
> @@ -679,7 +679,7 @@ static void llvm_emit_tex(
> }
> }
>
> - emit_data->output[0] = build_intrinsic(gallivm->builder,
> + emit_data->output[0] = lp_build_intrinsic(gallivm->builder,
> action->intr_name,
> emit_data->dst_type, args, c, LLVMReadNoneAttribute);
>
> diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h
> index 950a51b..9e05c24 100644
> --- a/src/gallium/drivers/radeon/radeon_llvm.h
> +++ b/src/gallium/drivers/radeon/radeon_llvm.h
> @@ -194,14 +194,6 @@ unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan);
>
> void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx);
>
> -LLVMValueRef
> -build_intrinsic(LLVMBuilderRef builder,
> - const char *name,
> - LLVMTypeRef ret_type,
> - LLVMValueRef *args,
> - unsigned num_args,
> - LLVMAttribute attr);
> -
> void
> build_tgsi_intrinsic_nomem(
> const struct lp_build_tgsi_action * action,
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index 2362979..66602c9 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -760,14 +760,14 @@ static void radeon_llvm_cube_to_2d_coords(struct lp_build_tgsi_context *bld_base
> unsigned i;
>
> cube_vec = lp_build_gather_values(bld_base->base.gallivm, in, 4);
> - v = build_intrinsic(builder, "llvm.AMDGPU.cube", LLVMVectorType(type, 4),
> + v = lp_build_intrinsic(builder, "llvm.AMDGPU.cube", LLVMVectorType(type, 4),
> &cube_vec, 1, LLVMReadNoneAttribute);
>
> for (i = 0; i < 4; ++i)
> coords[i] = LLVMBuildExtractElement(builder, v,
> lp_build_const_int32(gallivm, i), "");
>
> - coords[2] = build_intrinsic(builder, "fabs",
> + coords[2] = lp_build_intrinsic(builder, "fabs",
> type, &coords[2], 1, LLVMReadNoneAttribute);
> coords[2] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_RCP, coords[2]);
>
> @@ -1358,58 +1358,16 @@ static void emit_immediate(struct lp_build_tgsi_context * bld_base,
> ctx->soa.num_immediates++;
> }
>
> -LLVMValueRef
> -build_intrinsic(LLVMBuilderRef builder,
> - const char *name,
> - LLVMTypeRef ret_type,
> - LLVMValueRef *args,
> - unsigned num_args,
> - LLVMAttribute attr)
> -{
> - LLVMModuleRef module = LLVMGetGlobalParent(LLVMGetBasicBlockParent(LLVMGetInsertBlock(builder)));
> - LLVMValueRef function;
> -
> - function = LLVMGetNamedFunction(module, name);
> - if(!function) {
> - LLVMTypeRef arg_types[LP_MAX_FUNC_ARGS];
> - unsigned i;
> -
> - assert(num_args <= LP_MAX_FUNC_ARGS);
> -
> - for(i = 0; i < num_args; ++i) {
> - assert(args[i]);
> - arg_types[i] = LLVMTypeOf(args[i]);
> - }
> -
> - function = lp_declare_intrinsic(module, name, ret_type, arg_types, num_args);
> -
> - if (attr)
> - LLVMAddFunctionAttr(function, attr);
> - }
> -
> - return LLVMBuildCall(builder, function, args, num_args, "");
> -}
> -
> -static void build_tgsi_intrinsic(
> - const struct lp_build_tgsi_action * action,
> - struct lp_build_tgsi_context * bld_base,
> - struct lp_build_emit_data * emit_data,
> - LLVMAttribute attr)
> -{
> - struct lp_build_context * base = &bld_base->base;
> - emit_data->output[emit_data->chan] = build_intrinsic(
> - base->gallivm->builder, action->intr_name,
> - emit_data->dst_type, emit_data->args,
> - emit_data->arg_count, attr);
> -}
> -
> void
> -build_tgsi_intrinsic_nomem(
> - const struct lp_build_tgsi_action * action,
> - struct lp_build_tgsi_context * bld_base,
> - struct lp_build_emit_data * emit_data)
> +build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
> + struct lp_build_tgsi_context *bld_base,
> + struct lp_build_emit_data *emit_data)
> {
> - build_tgsi_intrinsic(action, bld_base, emit_data, LLVMReadNoneAttribute);
> + struct lp_build_context * base = &bld_base->base;
> + emit_data->output[emit_data->chan] =
> + lp_build_intrinsic(base->gallivm->builder, action->intr_name,
> + emit_data->dst_type, emit_data->args,
> + emit_data->arg_count, LLVMReadNoneAttribute);
> }
>
> static void emit_bfi(const struct lp_build_tgsi_action * action,
> @@ -1465,7 +1423,7 @@ static void emit_lsb(const struct lp_build_tgsi_action * action,
> };
>
> emit_data->output[emit_data->chan] =
> - build_intrinsic(gallivm->builder, "llvm.cttz.i32",
> + lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32",
> emit_data->dst_type, args, Elements(args),
> LLVMReadNoneAttribute);
> }
> @@ -1484,7 +1442,7 @@ static void emit_umsb(const struct lp_build_tgsi_action * action,
> };
>
> LLVMValueRef msb =
> - build_intrinsic(builder, "llvm.ctlz.i32",
> + lp_build_intrinsic(builder, "llvm.ctlz.i32",
> emit_data->dst_type, args, Elements(args),
> LLVMReadNoneAttribute);
>
> @@ -1511,7 +1469,7 @@ static void emit_imsb(const struct lp_build_tgsi_action * action,
> LLVMValueRef arg = emit_data->args[0];
>
> LLVMValueRef msb =
> - build_intrinsic(builder, "llvm.AMDGPU.flbit.i32",
> + lp_build_intrinsic(builder, "llvm.AMDGPU.flbit.i32",
> emit_data->dst_type, &arg, 1,
> LLVMReadNoneAttribute);
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 5962a49..fca0180 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -456,7 +456,7 @@ static void declare_input_vs(
> args[0] = t_list;
> args[1] = attribute_offset;
> args[2] = buffer_index;
> - input = build_intrinsic(gallivm->builder,
> + input = lp_build_intrinsic(gallivm->builder,
> "llvm.SI.vs.load.input", vec4_type, args, 3,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
>
> @@ -829,7 +829,7 @@ static LLVMValueRef fetch_input_gs(
> args[8] = uint->zero; /* TFE */
>
> return LLVMBuildBitCast(gallivm->builder,
> - build_intrinsic(gallivm->builder,
> + lp_build_intrinsic(gallivm->builder,
> "llvm.SI.buffer.load.dword.i32.i32",
> i32, args, 9,
> LLVMReadOnlyAttribute | LLVMNoUnwindAttribute),
> @@ -973,12 +973,12 @@ static void declare_input_fs(
>
> args[0] = llvm_chan;
> args[1] = attr_number;
> - front = build_intrinsic(gallivm->builder, intr_name,
> + front = lp_build_intrinsic(gallivm->builder, intr_name,
> input_type, args, args[3] ? 4 : 3,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
>
> args[1] = back_attr_number;
> - back = build_intrinsic(gallivm->builder, intr_name,
> + back = lp_build_intrinsic(gallivm->builder, intr_name,
> input_type, args, args[3] ? 4 : 3,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
>
> @@ -999,7 +999,7 @@ static void declare_input_fs(
> args[2] = params;
> args[3] = interp_param;
> radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 0)] =
> - build_intrinsic(gallivm->builder, intr_name,
> + lp_build_intrinsic(gallivm->builder, intr_name,
> input_type, args, args[3] ? 4 : 3,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
> radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 1)] =
> @@ -1017,7 +1017,7 @@ static void declare_input_fs(
> args[2] = params;
> args[3] = interp_param;
> radeon_bld->inputs[soa_index] =
> - build_intrinsic(gallivm->builder, intr_name,
> + lp_build_intrinsic(gallivm->builder, intr_name,
> input_type, args, args[3] ? 4 : 3,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
> }
> @@ -1038,7 +1038,7 @@ static LLVMValueRef buffer_load_const(LLVMBuilderRef builder, LLVMValueRef resou
> {
> LLVMValueRef args[2] = {resource, offset};
>
> - return build_intrinsic(builder, "llvm.SI.load.const", return_type, args, 2,
> + return lp_build_intrinsic(builder, "llvm.SI.load.const", return_type, args, 2,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
> }
>
> @@ -1289,7 +1289,7 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
> args[0] = values[2 * chan];
> args[1] = values[2 * chan + 1];
> args[chan + 5] =
> - build_intrinsic(base->gallivm->builder,
> + lp_build_intrinsic(base->gallivm->builder,
> "llvm.SI.packf16",
> LLVMInt32TypeInContext(base->gallivm->context),
> args, 2,
> @@ -1371,12 +1371,12 @@ static void si_alpha_test(struct lp_build_tgsi_context *bld_base,
> lp_build_const_float(gallivm, 1.0f),
> lp_build_const_float(gallivm, -1.0f));
>
> - build_intrinsic(gallivm->builder,
> + lp_build_intrinsic(gallivm->builder,
> "llvm.AMDGPU.kill",
> LLVMVoidTypeInContext(gallivm->context),
> &arg, 1, 0);
> } else {
> - build_intrinsic(gallivm->builder,
> + lp_build_intrinsic(gallivm->builder,
> "llvm.AMDGPU.kilp",
> LLVMVoidTypeInContext(gallivm->context),
> NULL, 0, 0);
> @@ -1397,7 +1397,7 @@ static void si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *bld_base
> SI_PARAM_SAMPLE_COVERAGE);
> coverage = bitcast(bld_base, TGSI_TYPE_SIGNED, coverage);
>
> - coverage = build_intrinsic(gallivm->builder, "llvm.ctpop.i32",
> + coverage = lp_build_intrinsic(gallivm->builder, "llvm.ctpop.i32",
> bld_base->int_bld.elem_type,
> &coverage, 1, LLVMReadNoneAttribute);
>
> @@ -1569,7 +1569,7 @@ static void si_llvm_emit_streamout(struct si_shader_context *shader,
> LLVMValueRef so_vtx_count =
> unpack_param(shader, shader->param_streamout_config, 16, 7);
>
> - LLVMValueRef tid = build_intrinsic(builder, "llvm.SI.tid", i32,
> + LLVMValueRef tid = lp_build_intrinsic(builder, "llvm.SI.tid", i32,
> NULL, 0, LLVMReadNoneAttribute);
>
> /* can_emit = tid < so_vtx_count; */
> @@ -2018,7 +2018,7 @@ static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context *bld_base)
>
> args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_NOP | SENDMSG_GS_DONE);
> args[1] = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
> - build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> + lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> LLVMVoidTypeInContext(gallivm->context), args, 2,
> LLVMNoUnwindAttribute);
> }
> @@ -2665,7 +2665,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
> emit_data->inst->Texture.NumOffsets > 0 : false;
>
> if (target == TGSI_TEXTURE_BUFFER) {
> - emit_data->output[emit_data->chan] = build_intrinsic(
> + emit_data->output[emit_data->chan] = lp_build_intrinsic(
> base->gallivm->builder,
> "llvm.SI.vs.load.input", emit_data->dst_type,
> emit_data->args, emit_data->arg_count,
> @@ -2714,7 +2714,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
> is_shadow ? ".c" : "", infix, has_offset ? ".o" : "",
> LLVMGetVectorSize(LLVMTypeOf(emit_data->args[0])));
>
> - emit_data->output[emit_data->chan] = build_intrinsic(
> + emit_data->output[emit_data->chan] = lp_build_intrinsic(
> base->gallivm->builder, intr_name, emit_data->dst_type,
> emit_data->args, emit_data->arg_count,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
> @@ -2761,7 +2761,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
> sprintf(intr_name, "%s.v%ui32", name,
> LLVMGetVectorSize(LLVMTypeOf(emit_data->args[0])));
>
> - emit_data->output[emit_data->chan] = build_intrinsic(
> + emit_data->output[emit_data->chan] = lp_build_intrinsic(
> base->gallivm->builder, intr_name, emit_data->dst_type,
> emit_data->args, emit_data->arg_count,
> LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
> @@ -2905,7 +2905,7 @@ static void si_llvm_emit_ddxy(
> i32 = LLVMInt32TypeInContext(gallivm->context);
>
> indices[0] = bld_base->uint_bld.zero;
> - indices[1] = build_intrinsic(gallivm->builder, "llvm.SI.tid", i32,
> + indices[1] = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid", i32,
> NULL, 0, LLVMReadNoneAttribute);
> store_ptr = LLVMBuildGEP(gallivm->builder, si_shader_ctx->lds,
> indices, 2, "");
> @@ -2994,7 +2994,7 @@ static void si_llvm_emit_vertex(
> kill = lp_build_select(&bld_base->base, can_emit,
> lp_build_const_float(gallivm, 1.0f),
> lp_build_const_float(gallivm, -1.0f));
> - build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
> + lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
> LLVMVoidTypeInContext(gallivm->context), &kill, 1, 0);
>
> for (i = 0; i < info->num_outputs; i++) {
> @@ -3028,7 +3028,7 @@ static void si_llvm_emit_vertex(
> /* Signal vertex emission */
> args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_EMIT | SENDMSG_GS);
> args[1] = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
> - build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> + lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> LLVMVoidTypeInContext(gallivm->context), args, 2,
> LLVMNoUnwindAttribute);
> }
> @@ -3046,7 +3046,7 @@ static void si_llvm_emit_primitive(
> /* Signal primitive cut */
> args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_CUT | SENDMSG_GS);
> args[1] = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
> - build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> + lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
> LLVMVoidTypeInContext(gallivm->context), args, 2,
> LLVMNoUnwindAttribute);
> }
> @@ -3057,7 +3057,7 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
> {
> struct gallivm_state *gallivm = bld_base->base.gallivm;
>
> - build_intrinsic(gallivm->builder, "llvm.AMDGPU.barrier.local",
> + lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.barrier.local",
> LLVMVoidTypeInContext(gallivm->context), NULL, 0,
> LLVMNoUnwindAttribute);
> }
> @@ -3629,7 +3629,7 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
>
> outputs[i].values[chan] =
> LLVMBuildBitCast(gallivm->builder,
> - build_intrinsic(gallivm->builder,
> + lp_build_intrinsic(gallivm->builder,
> "llvm.SI.buffer.load.dword.i32.i32",
> LLVMInt32TypeInContext(gallivm->context),
> args, 9,
> --
> 2.1.4
>
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