[Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

Neil Roberts neil at linux.intel.com
Wed Jul 29 08:16:29 PDT 2015


It seems a bit weird to modify the the is_power_of_two functions in
format_parser.py, was that intentional? It doesn't look like those
functions are actually used anywhere so maybe we could just remove them,
although it would probably make sense to do that in a separate patch.

Regards,
- Neil

Anuj Phogat <anuj.phogat at gmail.com> writes:

> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
>  src/mesa/drivers/common/meta_blit.c                   |  6 +++---
>  src/mesa/drivers/dri/i915/i915_texstate.c             |  2 +-
>  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
>  src/mesa/drivers/dri/i965/brw_reg.h                   |  2 +-
>  src/mesa/drivers/dri/i965/brw_tex_layout.c            |  8 ++++----
>  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp      |  2 +-
>  src/mesa/drivers/dri/i965/intel_blit.c                |  8 ++++----
>  src/mesa/main/format_parser.py                        |  6 +++---
>  src/mesa/main/macros.h                                | 11 -----------
>  9 files changed, 18 insertions(+), 29 deletions(-)
>
> diff --git a/src/mesa/drivers/common/meta_blit.c b/src/mesa/drivers/common/meta_blit.c
> index 317a304..71d18de 100644
> --- a/src/mesa/drivers/common/meta_blit.c
> +++ b/src/mesa/drivers/common/meta_blit.c
> @@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
>     y_scale = samples * 0.5;
>  
>     /* We expect only power of 2 samples in source multisample buffer. */
> -   assert(samples > 0 && is_power_of_two(samples));
> +   assert(samples > 0 && _mesa_is_pow_two(samples));
>     while (samples >> (shader_offset + 1)) {
>        shader_offset++;
>     }
> @@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
>     }
>  
>     /* We expect only power of 2 samples in source multisample buffer. */
> -   assert(samples > 0 && is_power_of_two(samples));
> +   assert(samples > 0 && _mesa_is_pow_two(samples));
>     while (samples >> (shader_offset + 1)) {
>        shader_offset++;
>     }
> @@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
>            * (so the floating point exponent just gets increased), rather than
>            * doing a naive sum and dividing.
>            */
> -         assert(is_power_of_two(samples));
> +         assert(_mesa_is_pow_two(samples));
>           /* Fetch each individual sample. */
>           sample_resolve = rzalloc_size(mem_ctx, 1);
>           for (i = 0; i < samples; i++) {
> diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
> index aef5ff9..f653f44 100644
> --- a/src/mesa/drivers/dri/i915/i915_texstate.c
> +++ b/src/mesa/drivers/dri/i915/i915_texstate.c
> @@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
>         * Thus, I guess we need do this for other platforms as well.
>         */
>        if (tObj->Target == GL_TEXTURE_CUBE_MAP_ARB &&
> -          !is_power_of_two(firstImage->Height))
> +          !_mesa_is_pow_two(firstImage->Height))
>           return false;
>  
>        state[I915_TEXREG_SS3] = ss3;     /* SS3_NORMALIZED_COORDS */
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
> index 01d3a56..96d4f37 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
> @@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment *ir)
>        return visit_continue_with_parent;
>     }
>     if (ir->lhs->as_dereference_variable() &&
> -       is_power_of_two(ir->write_mask) &&
> +       _mesa_is_pow_two(ir->write_mask) &&
>         !ir->condition) {
>        /* If we're writing just a channel, then channel-splitting the LHS is OK.
>         */
> diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
> index c8b1341..4867148 100644
> --- a/src/mesa/drivers/dri/i965/brw_reg.h
> +++ b/src/mesa/drivers/dri/i965/brw_reg.h
> @@ -853,7 +853,7 @@ static inline struct brw_reg
>  spread(struct brw_reg reg, unsigned s)
>  {
>     if (s) {
> -      assert(is_power_of_two(s));
> +      assert(_mesa_is_pow_two(s));
>  
>        if (reg.hstride)
>           reg.hstride += cvt(s) - 1;
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index 85c0864..fb78b08 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context *brw,
>     int i = 0;
>  
>     /* Alignment computations below assume bpp >= 8 and a power of 2. */
> -   assert (bpp >= 8 && bpp <= 128 && is_power_of_two(bpp));
> +   assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp));
>  
>     switch(mt->target) {
>     case GL_TEXTURE_1D:
> @@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context *brw,
>     ret_align = mt->tr_mode == INTEL_MIPTREE_TRMODE_YF ?
>                 align_yf[i] : align_ys[i];
>  
> -   assert(is_power_of_two(mt->num_samples));
> +   assert(_mesa_is_pow_two(mt->num_samples));
>  
>     switch (mt->num_samples) {
>     case 2:
> @@ -199,7 +199,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context *brw,
>            mt->target != GL_TEXTURE_1D_ARRAY);
>  
>     /* Alignment computations below assume bpp >= 8 and a power of 2. */
> -   assert (bpp >= 8 && bpp <= 128 && is_power_of_two(bpp)) ;
> +   assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp)) ;
>  
>     switch(mt->target) {
>     case GL_TEXTURE_2D:
> @@ -226,7 +226,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context *brw,
>     ret_align = mt->tr_mode == INTEL_MIPTREE_TRMODE_YF ?
>                 align_yf[i] : align_ys[i];
>  
> -   assert(is_power_of_two(mt->num_samples));
> +   assert(_mesa_is_pow_two(mt->num_samples));
>  
>     switch (mt->num_samples) {
>     case 4:
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index d2de2f0..b6c1372 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -1549,7 +1549,7 @@ vec4_generator::generate_code(const cfg_t *cfg)
>            *
>            * where they pack the four bytes from the low and high four DW.
>            */
> -         assert(is_power_of_two(dst.dw1.bits.writemask) &&
> +         assert(_mesa_is_pow_two(dst.dw1.bits.writemask) &&
>                  dst.dw1.bits.writemask != 0);
>           unsigned offset = __builtin_ctz(dst.dw1.bits.writemask);
>  
> diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
> index 4fc3fa8..6d92580 100644
> --- a/src/mesa/drivers/dri/i965/intel_blit.c
> +++ b/src/mesa/drivers/dri/i965/intel_blit.c
> @@ -121,14 +121,14 @@ get_tr_horizontal_align(uint32_t tr_mode, uint32_t cpp, bool is_src) {
>        return 0;
>  
>     /* Compute array index. */
> -   assert (bpp >= 8 && bpp <= 128 && is_power_of_two(bpp));
> +   assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp));
>     i = ffs(bpp / 8) - 1;
>  
>     align = tr_mode == INTEL_MIPTREE_TRMODE_YF ?
>             align_2d_yf[i] :
>             4 * align_2d_yf[i];
>  
> -   assert(is_power_of_two(align));
> +   assert(_mesa_is_pow_two(align));
>  
>     /* XY_FAST_COPY_BLT doesn't support horizontal alignment of 16. */
>     if (align == 16)
> @@ -150,14 +150,14 @@ get_tr_vertical_align(uint32_t tr_mode, uint32_t cpp, bool is_src) {
>        return 0;
>  
>     /* Compute array index. */
> -   assert (bpp >= 8 && bpp <= 128 && is_power_of_two(bpp));
> +   assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp));
>     i = ffs(bpp / 8) - 1;
>  
>     align = tr_mode == INTEL_MIPTREE_TRMODE_YF ?
>             align_2d_yf[i] :
>             4 * align_2d_yf[i];
>  
> -   assert(is_power_of_two(align));
> +   assert(_mesa_is_pow_two(align));
>  
>     /* XY_FAST_COPY_BLT doesn't support vertical alignments of 16 and 32. */
>     if (align == 16 || align == 32)
> diff --git a/src/mesa/main/format_parser.py b/src/mesa/main/format_parser.py
> index 11184f7..b1c592a 100755
> --- a/src/mesa/main/format_parser.py
> +++ b/src/mesa/main/format_parser.py
> @@ -40,7 +40,7 @@ SRGB = 'srgb'
>  YUV = 'yuv'
>  ZS = 'zs'
>  
> -def is_power_of_two(x):
> +def _mesa_is_pow_two(x):
>     return not bool(x & (x - 1))
>  
>  VERY_LARGE = 99999999999999999999999
> @@ -100,9 +100,9 @@ class Channel:
>        else:
>           return 1
>  
> -   def is_power_of_two(self):
> +   def _mesa_is_pow_two(self):
>        """Returns true if the size of this channel is a power of two."""
> -      return is_power_of_two(self.size)
> +      return _mesa_is_pow_two(self.size)
>  
>     def datatype(self):
>        """Returns the datatype corresponding to a channel type and size"""
> diff --git a/src/mesa/main/macros.h b/src/mesa/main/macros.h
> index 0608650..07919a6 100644
> --- a/src/mesa/main/macros.h
> +++ b/src/mesa/main/macros.h
> @@ -679,17 +679,6 @@ minify(unsigned value, unsigned levels)
>  }
>  
>  /**
> - * Return true if the given value is a power of two.
> - *
> - * Note that this considers 0 a power of two.
> - */
> -static inline bool
> -is_power_of_two(unsigned value)
> -{
> -   return (value & (value - 1)) == 0;
> -}
> -
> -/**
>   * Align a value up to an alignment value
>   *
>   * If \c value is not already aligned to the requested alignment value, it
> -- 
> 1.9.3
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev


More information about the mesa-dev mailing list