[Mesa-dev] [PATCH 6/9] radeonsi: add support for SQRT

[Tom Stellard]

On Mon, Mar 02, 2015 at 12:54:20PM +0100, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
> 

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> ---
>  src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 2 ++
>  src/gallium/drivers/radeonsi/si_pipe.c              | 2 +-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> index 8026723..385d3ad 100644
> --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
> @@ -1363,6 +1363,8 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
>  	bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_cmp;
>  	bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
>  	bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
> +	bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
> +	bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
>  	bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
>  	bld_base->op_actions[TGSI_OPCODE_TEX].fetch_args = tex_fetch_args;
>  	bld_base->op_actions[TGSI_OPCODE_TEX].intr_name = "llvm.AMDGPU.tex";
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 87eeac6..993b153 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -403,7 +403,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
>  	case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
>  		return 1;
>  	case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> -		return 0;
> +		return 1;
>  	case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
>  		/* Indirection of geometry shader input dimension is not
>  		 * handled yet
> -- 
> 2.1.0
> 
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