[Mesa-dev] [PATCH 0/4] Support multiple state pipelines for i965
Jordan Justen
jordan.l.justen at intel.com
Tue Mar 10 10:49:53 PDT 2015
git://people.freedesktop.org/~jljusten/mesa i965-pipelines
Gen8 appears to require a separate pipeline for CS support.
Here is another take on the multiple pipelines idea. In contrast to
the previous multiple pipeline series, it preserves usage of
brw->state.dirty in most places.
Now, it saves off the dirty state for the other pipelines at state
upload time. This seems to be a lot less intrusive than saving the
dirty state for every pipeline whenever new dirty states are flagged.
I tested this for render via jenkins, and for CS on gen7.
Jordan Justen (4):
i965/state: Rename brw_upload_state to brw_upload_render_state
i965/state: Allow brw->atoms[] to be used by multiple pipelines
i965/state: Create separate dirty state bits for each pipeline
i965/state: Add compute pipeline with empty atom lists
src/mesa/drivers/dri/i965/brw_context.h | 10 +-
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_state.h | 3 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 137 +++++++++++++++++++--------
4 files changed, 112 insertions(+), 40 deletions(-)
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2.1.4
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