[Mesa-dev] [PATCH v2 0/4] Support multiple state pipelines for i965

[Kristian Høgsberg]

On Wed, Mar 11, 2015 at 11:53 AM, Jordan Justen
<jordan.l.justen at intel.com> wrote:
> git://people.freedesktop.org/~jljusten/mesa i965-pipelines-v2
>
> The big changes from v1:
>  * Rename brw->atoms[] to render_atoms
>  * Add brw->compute_atoms[]
>  * Replace brw_pipeline_first_atom with brw_get_pipeline_atoms
>
> With this version, I was not able to measure a performance change with
> SynMask Batch7 on ivb or bsw.

Looks good to me,
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>

> Jordan Justen (4):
>   i965/state: Rename brw_upload_state to brw_upload_render_state
>   i965/state: Support multiple pipelines in brw->num_atoms
>   i965/state: Create separate dirty state bits for each pipeline
>   i965/state: Add compute pipeline with empty atom lists
>
>  src/mesa/drivers/dri/i965/brw_context.h      |  13 ++-
>  src/mesa/drivers/dri/i965/brw_draw.c         |   2 +-
>  src/mesa/drivers/dri/i965/brw_state.h        |   3 +-
>  src/mesa/drivers/dri/i965/brw_state_upload.c | 154 ++++++++++++++++++++-------
>  4 files changed, 127 insertions(+), 45 deletions(-)
>
> --
> 2.1.4
>